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參數(shù)資料
| 型號(hào)： | XCS05-4CS208I |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴達(dá)和Spartan - xL的家庭現(xiàn)場(chǎng)可編程門陣列 |
| 文件頁數(shù)： | 6/66頁 |
| 文件大?。?/td> | 809K |
| 代理商： | XCS05-4CS208I |
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R
Spartan and Spartan-XL Families Field Programmable Gate Arrays
4-6
DS060 (v1.5) March 2, 2000
The register choice is made by placing the appropriate
library symbol. For example, IFD is the basic input flip-flop
(rising edge triggered), and ILD is the basic input latch
(transparent-High). Variations with inverted clocks are also
available. The clock signal inverter is also shown in
Figure 6
on the CK line.
The Spartan IOB data input path has a one-tap delay ele-
ment: either the delay is inserted (default), or it is not. The
Spartan-XL IOB data input path has a two-tap delay ele-
ment, with choices of a full delay, a partial delay, or no
delay. The added delay guarantees a zero hold time with
respect to clocks routed through the global clock buffers.
(See
“
Global Nets and Buffers
”
on page 11
for a description
of the global clock buffers in the Spartan/XL families.) For a
shorter input register setup time, with positive hold-time,
attach a NODELAY attribute or property to the flip-flop.
The output of the input register goes to the routing chan-
nels (via I1 and I2 in
Figure 5
). The I1 and I2 signals that
exit the IOB can each carry either the direct or registered
input signal.
The 5V Spartan input buffers can be globally configured for
either TTL (1.2V) or CMOS (VCC/2) thresholds, using an
option in the bitstream generation software. The Spartan
output levels are also configurable; the two global adjust-
ments of input threshold and output level are independent.
The inputs of Spartan devices can be driven by the outputs
of any 3.3V device, if the Spartan inputs are in TTL mode.
Spartan-XL inputs are TTL compatible and 3.3V CMOS
compatible.
Supported sources for Spartan/XL device inputs are shown
in
Table 4
.
Spartan-XL I/Os are fully 5V tolerant even though the V
CC
is 3.3V. This allows 5V signals to directly connect to the
Spartan-XL inputs without damage, as shown in
Table 4
. In
addition, the 3.3V V
CC
can be applied before or after 5V
signals are applied to the I/Os. This makes the Spartan-XL
devices immune to power supply sequencing problems.
Figure 5: Simplified Spartan/XL IOB Block Diagram
EC
D
Q
CK
Multiplexer Controlled
by Configuration Program
Delay
Programmable
Pull-Up/
Pull-Down
Network
OUTPUT DRIVER
Programmable Slew Rate
Programmable TTL/CMOS Drive
T
O
OK
I1
I2
EC
IK
GTS
INPUT BUFFER
Package
Pad
EC
D
Q
CK
Rev 1.1
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PDF描述 |
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| XCS05-4CS240C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS240I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS256C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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| XCS05-4CS280C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCS05-4CS240C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS240I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS256C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS256I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-4CS280C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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