參數(shù)資料
型號(hào)： XCS20XL-3BG100I
廠(chǎng)商： Xilinx, Inc.
英文描述： Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述： 斯巴達(dá)和Spartan - xL的家庭現(xiàn)場(chǎng)可編程門(mén)陣列
文件頁(yè)數(shù)： 49/82頁(yè)
文件大小： 863K
代理商： XCS20XL-3BG100I
Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
1-800-255-7778
R
Spartan-XL DC Characteristics Over Operating Conditions
Supply Current Requirements During Power-On
Spartan-XL FPGAs require that a minimum supply current
ICCPO be provided to the VCC lines for a successful power
on. If more current is available, the FPGA can consume
more than ICCPO min., though this cannot adversely affect
reliability.
A maximum limit for ICCPO is not specified. Be careful when
using foldback/crowbar supplies and fuses. It is possible to
control the magnitude of ICCPO by limiting the supply current
available to the FPGA. A current limit below the trip level will
avoid inadvertently activating over-current protection cir-
cuits.
Symbol
Description
Min
Typ.
Max
Units
VOH
High-level output voltage @ IOH = –4.0 mA, VCC min (LVTTL)
2.4
-
V
High-level output voltage @ IOH = –500 A, (LVCMOS)
90% VCC
--
V
VOL
Low-level output voltage @ IOL = 12.0 mA, VCC min (LVTTL)(1)
--
0.4
V
Low-level output voltage @ IOL = 24.0 mA, VCC min (LVTTL)(2)
--
0.4
V
Low-level output voltage @ IOL = 1500 A, (LVCMOS)
-
10% VCC
V
VDR
Data retention supply voltage (below which configuration data
may be lost)
2.5
-
V
ICCO
Quiescent FPGA supply current(3,4)
Commercial
-
0.1
2.5
mA
Industrial
-
0.1
5
mA
ICCPD
Power Down FPGA supply current(3,5)
Commercial
-
0.1
2.5
mA
Industrial
-
0.1
5
mA
IL
Input or output leakage current
–10
-
10
A
CIN
Input capacitance (sample tested)
-
10
pF
IRPU
Pad pull-up (when selected) @ VIN = 0V (sample tested)
0.02
-
0.25
mA
IRPD
Pad pull-down (when selected) @ VIN = 3.3V (sample tested)
0.02
-
mA
Notes:
1.
With up to 64 pins simultaneously sinking 12 mA (default mode).
2.
With up to 64 pins simultaneously sinking 24 mA (with 24 mA option selected).
3.
With 5V tolerance not selected, no internal oscillators, and the FPGA configured with the Tie option.
4.
With no output current loads, no active input resistors, and all package pins at VCC or GND.
5.
With PWRDWN active.
Symbol
Description
Min
Max
Units
ICCPO
Total VCC supply current required during power-on
100
-
mA
TCCPO
VCC ramp time(2,3)
-50
ms
Notes:
1.
The ICCPO requirement applies for a brief time (commonly only a few milliseconds) when VCC ramps from 0 to 3.3V.
2.
The ramp time is measured from GND to VCC max on a fully loaded board.
3.
VCC must not dip in the negative direction during power on.
相關(guān)PDF資料
PDF描述
XCS20XL-3BG144C Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG144I Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG208C Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG208I Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG240C Spartan and Spartan-XL Families Field Programmable Gate Arrays
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XCS20XL-3BG144C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG144I 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG208C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG208I 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
XCS20XL-3BG240C 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*