參數(shù)資料
型號(hào)： XCS40XL-5PQG208C
廠(chǎng)商： Xilinx Inc
文件頁(yè)數(shù)： 12/83頁(yè)
文件大小： 0K
描述： IC SPARTAN-XL FPGA 40K 208-PQFP
產(chǎn)品變化通告： Product Discontinuation 26/Oct/2011
標(biāo)準(zhǔn)包裝： 24
系列： Spartan®-XL
LAB/CLB數(shù)： 784
邏輯元件/單元數(shù)： 1862
RAM 位總計(jì)： 25088
輸入/輸出數(shù)： 169
門(mén)數(shù)： 40000
電源電壓： 3 V ~ 3.6 V
安裝類(lèi)型： 表面貼裝
工作溫度： 0°C ~ 85°C
封裝/外殼： 208-BFQFP
供應(yīng)商設(shè)備封裝： 208-PQFP（28x28）
其它名稱(chēng)： 122-1301
Spartan and Spartan-XL FPGA Families Data Sheet
2
DS060 (v2.0) March 1, 2013
Product Specification
R
Product Obsolete/Under Obsolescence
General Overview
Spartan series FPGAs are implemented with a regular, flex-
ible, programmable architecture of Configurable Logic
Blocks (CLBs), interconnected by a powerful hierarchy of
versatile routing resources (routing channels), and sur-
rounded by a perimeter of programmable Input/Output
Blocks (IOBs), as seen in Figure 1. They have generous
routing resources to accommodate the most complex inter-
connect patterns.
The devices are customized by loading configuration data
into internal static memory cells. Re-programming is possi-
ble an unlimited number of times. The values stored in these
memory cells determine the logic functions and intercon-
nections implemented in the FPGA. The FPGA can either
actively read its configuration data from an external serial
PROM (Master Serial mode), or the configuration data can
be written into the FPGA from an external device (Slave
Serial mode).
Spartan series FPGAs can be used where hardware must
be adapted to different user applications. FPGAs are ideal
for shortening design and development cycles, and also
offer a cost-effective solution for production rates well
beyond 50,000 systems per month.
Figure 1: Basic FPGA Block Diagram
CLB
B-
SCAN
CLB
Routing Channels
VersaRing Routing Channels
CLB
IOB
RDBK
START
-UP
OSC
DS060_01_081100
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