參數(shù)資料
型號: XCV200-6BGG256I
廠商: XILINX INC
元件分類: FPGA
英文描述: FPGA, 1176 CLBS, 236666 GATES, 333 MHz, PBGA256
封裝: BGA-256
文件頁數(shù): 16/24頁
文件大小: 167K
代理商: XCV200-6BGG256I
Virtex 2.5 V Field Programmable Gate Arrays
R
DS003-3 (v3.2) September 10, 2002
Module 3 of 4
Production Product Specification
1-800-255-7778
23
Virtex Data Sheet
The Virtex Data Sheet contains the following modules:
DS003-1, Virtex 2.5V FPGAs:
DS003-2, Virtex 2.5V FPGAs:
DS003-3, Virtex 2.5V FPGAs:
DC and Switching Characteristics (Module 3)
DS003-4, Virtex 2.5V FPGAs:
01/00
1.9
Updated DLL Jitter Parameter table and waveforms, added Delay Measurement
Methodology table for different I/O standards, changed buffered Hex line info and
Input/Output Timing measurement notes.
03/00
2.0
New TBCKO values; corrected FG680 package connection drawing; new note about status
of CCLK pin after configuration.
05/00
2.1
Modified "Pins not listed ..." statement. Speed grade update to Final status.
05/00
2.2
Modified Table 18.
09/00
2.3
Added XCV400 values to table under Minimum Clock-to-Out for Virtex Devices.
Corrected Units column in table under IOB Input Switching Characteristics.
Added values to table under CLB SelectRAM Switching Characteristics.
10/00
2.4
Corrected Pinout information for devices in the BG256, BG432, and BG560 packages in
Table 18.
Corrected BG256 Pin Function Diagram.
04/02/01
2.5
Revised minimums for Global Clock Set-Up and Hold for LVTTL Standard, with DLL.
Converted file to modularized format. See the Virtex Data Sheet section.
04/19/01
2.6
Clarified TIOCKP and TIOCKON IOB Output Switching Characteristics descriptors.
07/19/01
2.7
Under Absolute Maximum Ratings, changed (TSOL) to 220 °C .
07/26/01
2.8
Removed TSOL parameter and added footnote to Absolute Maximum Ratings table.
10/29/01
2.9
Updated the speed grade designations used in data sheets, and added Table 1, which
shows the current speed grade designation for each device.
02/01/02
3.0
Added footnote to DC Input and Output Levels table.
07/19/02
3.1
Removed mention of MIL-M-38510/605 specification.
Added link to xapp158 from the Power-On Power Supply Requirements section.
09/10/02
3.2
Date
Version
Revision
相關(guān)PDF資料
PDF描述
XCV200-6BGG352I FPGA, 1176 CLBS, 236666 GATES, 333 MHz, PBGA352
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