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參數(shù)資料
| 型號： | XQ4000ESERIES |
| 元件分類： | FPGA |
| 英文描述： | QPRO XQ4000E/EX QML High-Reliability FPGAs |
| 中文描述： | QPRO XQ4000E/EX QML第高可靠性的FPGA |
| 文件頁數(shù)： | 31/36頁 |
| 文件大小： | 304K |
| 代理商： | XQ4000ESERIES |
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QPRO XQ4000E/EX QML High-Reliability FPGAs
DS021 (v2.2) June 25, 2000
Product Specification
1-800-255-7778FXQ4028EX IOB Output Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System) and back-annotated to the simulation netlist.
These path delays, provided as a guideline, have been
extracted from the static timing analyzer report. All timing
parameters assume worst-case operating conditions (sup-
ply voltage and junction temperature). For Propagation
Delays, slew-rate = fast unless otherwise noted. Values
apply to all XQ4000EX devices unless otherwise noted.
Symbol
Description
-4
Units
Min
Max
Propagation Delays (TTL Output Levels)
T
OKPOF
T
OPF
T
TSHZ
T
TSONF
T
OKFPF
T
CEFPF
T
OFPF
Setup and Hold Times
Clock (OK) to pad, fast
-
7.4
ns
Output (O) to pad, fast
-
6.2
ns
3-state to pad High-Z, slew-rate independent
-
4.9
ns
3-state to pad active and valid, fast
-
6.2
ns
Output MUX select (OK) to pad
-
6.7
ns
Fast path output MUX input (EC) to pad
-
6.2
Slowest path output MUX input (EC) to pad
-
7.3
T
OOK
T
OKO
T
ECOK
T
OKEC
Clocks
Output (O) to clock (OK) setup time
0.6
-
ns
Output (O) to clock (OK) hold time
0
-
ns
Clock enable (EC) to clock (OK) setup
0
-
ns
Clock enable (EC) to clock (OK) hold
0
-
ns
T
CH
T
CL
Clock High
3.5
-
ns
Clock Low
3.5
-
ns
Global Set/Reset
T
MRW
T
RRI
Minimum GSR pulse width
13.0
-
ns
Delay from GSR input to any pad
30.2
-
ns
Notes:
1.
2.
Output timing is measured at TTL threshold, with 35 pF external capacitive loads.
For CMOS output levels, see the
"XQ4028EX Output Level and Slew Rate Adjustments" on page 27
.
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| XQ4000EXSERIES | QPRO XQ4000E/EX QML High-Reliability FPGAs |
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| XQ4005E-4HQ191N | QPRO XQ4000E/EX QML High-Reliability FPGAs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XQ4000EX | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4000EXSERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:QPRO XQ4000E/EX QML High-Reliability FPGAs |
| XQ4000XL | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4005E | 制造商:XILINX 制造商全稱:XILINX 功能描述:QPRO XQ4000E/EX QML High-Reliability FPGAs |
| XQ4005E-3BG191M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
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