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鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗372929 > XQ4028E-4HQ191N (Xilinx, Inc.) QPRO XQ4000E/EX QML High-Reliability FPGAs PDF璩囨枡涓嬭級

鍙冩暩(sh霉)璩囨枡

鍨嬭櫉锛�	XQ4028E-4HQ191N
寤犲晢锛�	Xilinx, Inc.
鍏冧欢鍒嗛锛�	FPGA
鑻辨枃鎻忚堪锛�	QPRO XQ4000E/EX QML High-Reliability FPGAs
涓枃鎻忚堪锛�	QPRO XQ4000E/EX QML绗珮鍙潬鎬х殑FPGA
鏂囦欢闋佹暩(sh霉)锛�	18/36闋�
鏂囦欢澶у皬锛�	304K
浠ｇ悊鍟嗭細	XQ4028E-4HQ191N

QPRO XQ4000E/EX QML High-Reliability FPGAs

1-800-255-7778

Product Specification

XQ4028EX Switching Characteristics

Definition of Terms

In the following tables, some specifications may be designated as Advance or Preliminary. These terms are defined as

follows:

Advance:

Initial estimates based on simulation and/or extrapolation from other speed grades, devices, or device families.

Values are subject to change. Use as estimates, not for production.

Preliminary:

Based on preliminary characterization. Further changes are not expected.

Unmarked:

Specifications not identified as either Advance or Preliminary are to be considered Final.

Except for pin-to-pin input and output parameters, the A.C. parameter delay specifications included in this document are

derived from measuring internal test patterns. All specifications are representative of worst-case supply voltage and junction

temperature conditions.

All specifications subject to change without notice.

XQ4028EX Absolute Maximum Ratings

Supply voltage relative to GND

鈥�

0.5 to +7.0

Input voltage relative to GND

Voltage applied to High-Z output

Longest supply voltage rise time from 1V to 4V

STG

Storage temperature (ambient)

Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions

is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.

Maximum DC excursion above V

or below Ground must be limited to either 0.5V or 10 mA, whichever is easier to achieve.

Maximum total combined current on all dedicated inputs and Tri-state outputs must not exceed 200 mA. During transitions, the

device pins may undershoot to

鈥�

2.0V or overshoot toV

+2.0V, provided this over or undershoot lasts less than 10 ns and with the

forcing current being limited to 200 mA.

鐩搁棞PDF璩囨枡	PDF鎻忚堪
XQ4028E-4PG191M	QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4028E-4PG191N	QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4013E-3HQ191M	QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4013E-3HQ191N	QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4013E-4CB191M	QPRO XQ4000E/EX QML High-Reliability FPGAs

鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉)	鍙冩暩(sh霉)鎻忚堪
XQ4028E-4HQ196M	鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:QML High-Reliability FPGAs
XQ4028E-4HQ196N	鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:QML High-Reliability FPGAs
XQ4028E-4PG191M	鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4028E-4PG191N	鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4028E-4PG196M	鍒堕€犲晢:XILINX 鍒堕€犲晢鍏ㄧū:XILINX 鍔熻兘鎻忚堪:QML High-Reliability FPGAs

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