XR-2211
5
Rev. 3.01
DC ELECTRICAL CHARACTERISTICS
(CONT’D)
Test Conditions:
V
CC
= 12V, T
A
= +25
°
C, R
O
= 30K , C
O
= 0.033 F,
unless otherwise specified.
Parameter
Min.
Typ.
Max.
Unit
Conditions
Voltage Comparator Section
Input Impedance
2
M
Measured at Pins 3 and 8
Input Bias Current
100
nA
Voltage Gain
55
70
dB
R
L
= 5.1K
I
C
= 3mA
V
O
= 20V
Output Voltage Low
300
500
mV
Output Leakage Current
0.01
10
A
Internal Reference
Voltage Level
4.9
5.3
5.7
V
Measured at Pin 10
Output Impedance
100
AC Small Signal
Maximum Source Current
80
A
Notes
Parameters are guaranteed over the recommended operating conditions, but are not 100% tested in production.
Bold face parameters
are covered by production test and guaranteed over operating temperature range.
Specifications are subject to change without notice
ABSOLUTE MAXIMUM RATINGS
Power Supply
Input Signal Level
Power Dissipation
20V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . .
3V rms
900mW
Package Power Dissipation Ratings
CDIP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above T
A
= 25
°
C
PDIP
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above T
A
= 25
°
C
SOIC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Derate Above T
A
= 25
°
C
750mW
8mW/
°
C
800mW
60mW/
°
C
390mW
5mW/
°
C
. . . . . . . . . . . . . . .
. . . . . . . . . . . . . .
. . . . . . . . . . . . . . .
SYSTEM DESCRIPTION
The main PLL within the XR-2211 is constructed from an
input preamplifier, analog multiplier used as a phase
detector and a precision voltage controlled oscillator
(VCO). The preamplifier is used as a limiter such that
input signals above typically 10mV rms are amplified to a
constant high level signal. The multiplying-type phase
detector acts as a digital exclusive or gate. Its output
(unfiltered) produces sum and difference frequencies of
the input and the VCO output. The VCO is actually a
current controlled oscillator with its normal input current
(f
O
) set by a resistor (R
0
) to ground and its driving current
with a resistor (R
1
) from the phase detector.
The output of the phase detector produces sum and
difference of the input and the VCO frequencies
(internally connected). When in lock, these frequencies
are f
IN
+ f
VCO
(2 times f
IN
when in lock) and f
IN
- f
VCO
(0Hz
when lock). By adding a capacitor to the phase detector
output, the 2 times f
IN
component is reduced, leaving a
DC voltage that represents the phase difference between
the two frequencies. This closes the loop and allows the
VCO to track the input frequency.
The FSK comparator is used to determine if the VCO is
driven above or below the center frequency (FSK
comparator). This will produce both active high and
active low outputs to indicate when the main PLL is in lock
(quadrature
phase
detector
comparator).
and
lock
detector