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參數(shù)資料
| 型號： | XR-T7295IP |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DS3/Sonet STS-1 Integrated Line Receiver |
| 中文描述： | RECEIVER, PDIP20 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-20 |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 226K |
| 代理商： | XR-T7295IP |
XR-T7295
13
Rev. 1.05
Data
Rate
DS3
REQB
0
LOSTHR
0
Min.
Threshold
60
Max.
Threshold
220
Unit
mV pk
V
DD
/2
V
DD
0
40
145
mV pk
25
90
mV pk
1
45
175
mV pk
V
DD
/2
V
DD
0
30
115
mV pk
20
70
mV pk
STS-1
0
75
275
mV pk
V
DD
/2
V
DD
0
50
185
mV pk
30
115
mV pk
1
55
220
mV pk
V
DD
/2
V
DD
35
145
mV pk
25
90
mV pk
Notes
- Lower threshold is 1.5 dB below upper threshold.
- The RLOS alarm is an indication of the presence of an input signal, not a bit error rate indication. Table 1 gives the minimum
input amplitude needed for error free operation (BER < 1e-
9
) Independent of the RLOS state, the device will attempt to recover
correct timing data. The RLOS low-to-high transition typically occurs 1dB below the high to low transition.
Table 7. Analog Loss-of-Signal Thresholds
RECOVERED CLOCK AND DATA TIMING
Table 8and Figure 11summarize the timing relationships
between the logic signals RCLK, RPDATA, and RNDATA.
The duty cycle is referenced to V
DD
/2 threshold level.
RPDATA and RNDATA change on the rising edge of
RCLK and are valid during the falling edge of RCLK. A
positive pulse at R
IN
creates a high level on RPDATA and
a low level on RNDATA. A negative pulse at the input
creates a high level on RNDATA and a low level on
RPDATA, and a received zero produces low levels on
both RPDATA and RNDATA.
IN-CIRCUIT TEST CAPABILITY
When pulled low, the ICT pin forces all digital output
buffers (RCLK, RPDATA, RNDATA, RLOS, RLOL pins) to
be placed in a high output impedance state. This feature
allows in-circuit testing to be done on neighboring devices
without concern for XR-T7295 device buffer damage. An
internal pull-up device (nominally 50k
) is provided on
this pin therefore, users can leave this pin unconnected
for normal operation. Test equipment can pull ICT low
during in-circuit testing without damaging the device.
This is the only pin for which internal pull-up/pull-down is
provided.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR-T7295 | DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7295IW | DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7296 | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IP | DS3/STS-1, E3 Integrated Line Transmitter |
| XR-T7296IW | DS3/STS-1, E3 Integrated Line Transmitter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR-T7295IW | 制造商:EXAR 制造商全稱:EXAR 功能描述:DS3/Sonet STS-1 Integrated Line Receiver |
| XR-T7295SIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Receiver |
| XR-T7295SIW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ATM/SONET Receiver |
| XR-T7295TIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
| XR-T7295TIW | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PCM Receiver |
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