XR16C2550
5
REV. 1.0.2
2.97V TO 5.5V DUART WITH 16-BYTE FIFO
NOTE: Pin type: I=Input, O=Output, IO= Input/output, OD=Output Open Drain.
DSRB#
22
25
20
I
UART channel B Data-Set-Ready (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
CDB#
19
21
16
I
UART channel B Carrier-Detect (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
RIB#
23
26
21
I
UART channel B Ring-Indicator (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
OP2B#
13
15
9
O
Output Port 2 Channel B - The output state is defined by the user
and through the software setting of MCR[3]. INTB is set to the active
mode and OP2B# output to a logic 0 when MCR[3] is set to a logic
1. INTB is set to the three state mode and OP2B# to a logic 1 when
MCR[3] is set to a logic 0. See MCR[3]. This output should not be
used as a general output else it will disturb the INTB output function-
ality. If it is not used, leave it unconnected.
ANCILLARY SIGNALS
XTAL1
16
18
13
I
Crystal or external clock input.
XTAL2
17
19
14
O
Crystal or buffered clock output.
RESET
35
39
36
I
Reset (active high) - A longer than 40 ns logic 1 pulse on this pin will
reset the internal registers and all outputs. The UART transmitter
output will be held at logic 1, the receiver input will be ignored and
outputs are reset during reset period (see External Reset Condi-
tions).
VCC
40
44
42
Pwr 2.97V to 5.5V power supply. All inputs are 5V tolerant.
GND
20
22
17
Pwr Power supply common, ground.
N.C.
-
12, 24,
25, 37
No Connection.
Pin Description
NAME
40-PDIP
PIN #
44-PLCC
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION