參數(shù)資料
型號: XR16C850CQ
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
中文描述: 1 CHANNEL(S), 2.25M bps, SERIAL COMM CONTROLLER, PQFP52
封裝: QFP-52
文件頁數(shù): 6/55頁
文件大?。?/td> 331K
代理商: XR16C850CQ
XR16C850
6
Rev. 1.20
to GND when CS0 or CS1 is used.
A8 / IOW
19
21
17
18
I
Address-8 Select Bit or Input/Output Write (dual
function) - When the PC mode is selected, this pin
is used as 9th address line to decode the COM1-4
and LPT ports. During STD mode, a logic 1 transition
creates a write strobe. Its function is the same as -
IOW (see -IOW), but it acts as an active high input
signal. Either -IOW or IOW is required to transfer
data from the CPU to 850 during a write operation.
Connect this pin to GND when –IOW is used.
A9
-
1
37
40
I
Address-9 Select Bit (internal pull-up) - When the
PC mode is selected, this pin is used as 10th
address line to decode the COM1-4 and LPT ports.
This pin has no function in the STD mode.
-AEN / -AS
25
28
24
26
I
Address Enable or Address Strobe (dual function) -
. During PC mode operation, valid COM1-4 ports are
decoded when -AEN transitions to a logic 0. During
the STD mode a logic 0 transition on -AS latches the
state of the chip selects and the register select bits,
A0-A2. This input is used when address and chip
selects are not stable for the duration of a read or
write operation, i.e., a microprocessor that needs to
demultiplex the address and data bits. If not re-
quired, the -AS input can be permanently tied to
GND (it is edge triggered).
-BAUDOUT
(See LPT-1)
D0-D7
1-8
2-9
43-47
2-4
47-51
2-4
I/O
Data Bus (Bi-directional) - These pins are the eight
bit, three state data bus for transferring information
to or from the controlling CPU. D0 is the least
significant bit and the first data bit in a transmit or
receive serial data stream.
D10, D11,
D12
-
-
48,1
22
52,1
24
O
High order data bus. When 16 bit data bus (BUS8/
16 = logic zero) is selected, received data errors
(parity, framing, break) can be read along with its
data byte on these pins. D10 is parity error bit, D11
Symbol
Pin
Signal
type
Pin Description
40
44
48
52
SYMBOL DESCRIPTION
相關(guān)PDF資料
PDF描述
XR16C850 UART with 128-byte FIFO’s FIFO Counters and Half-duplex Control
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