參數(shù)資料
型號: XR16L570IL24-F
廠商: Exar Corporation
文件頁數(shù): 10/47頁
文件大小: 0K
描述: IC UART FIFO 16B 24QFN
標(biāo)準(zhǔn)包裝: 490
特點(diǎn): *
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS422
電源電壓: 1.62 V ~ 5.5 V
帶自動(dòng)流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動(dòng)位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 24-QFN 裸露焊盤(4x4)
包裝: 托盤
XR16L570
18
SMALLEST 1.62V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
REV. 1.0.1
2.19
Internal Loopback
The L570 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally
including automatic hardware and software flow control. Figure 13 shows how the modem port signals are re-
configured. The general purpose outputs OP1#, OP2#, the modem output DTR# and the modem inputs DSR#,
RI# and CD# are not available in the 24-QFN package of the L570. However, in internal loopback mode, the
DTR#, OP1# and OP2# bits in the MCR register, control the DSR#, RI# and CD# bits in the MSR register
respectively. Transmit data from the transmit shift register output is internally routed to the receive shift register
input allowing the system to receive the same data that it was sending. The TX pin is held HIGH while RTS# is
de-asserted, and CTS# input is ignored. Caution: the RX input pins must be held HIGH during loopback test
else upon exiting the loopback test the UART may detect and report a false “break” signal.
FIGURE 13. INTERNAL LOOP BACK
TX
RX
Modem
/
G
ener
al
Pur
pose
C
ont
rol
Logic
Inte
rna
lD
a
ta
B
u
s
Line
s
and
C
ont
ro
lSig
nals
RTS#
M CR bit-4=1
VCC
Transm it Shift Register
(THR/FIFO )
Receive Shift Register
(RHR/FIFO )
CTS#
DTR#
DSR#
RI#
CD#
OP1#
RTS#
CTS#
DTR#
DSR#
RI#
CD#
VCC
OP2#
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