參數(shù)資料
型號: XR16L580IL
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
中文描述: 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, QCC32
封裝: 5 X 5 MM, 0.90 MM HEIGHT, QFN-32
文件頁數(shù): 36/47頁
文件大?。?/td> 285K
代理商: XR16L580IL
XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
á
REV. 1.2.0
36
AC ELECTRICAL CHARACTERISTICS
U
NLESS
OTHERWISE
NOTED
: TA=0
O
TO
70
O
C (-40
O
TO
+85
O
C
FOR
INDUSTRIAL
GRADE
PACKAGE
), V
CC
=2.25 - 5.5V,
50
P
F
LOAD
WHERE
APPLICABLE
S
YMBOL
P
ARAMETER
L
IMITS
2.5
M
IN
M
AX
L
IMITS
3.3
M
IN
M
AX
L
IMITS
5.0
M
IN
M
AX
U
NIT
-
Crystal Frequency
18
20
24
MHz
OSC
External Clock Frequency
24
33
50
MHz
CLK
External Clock Low/High Time
20
15
10
ns
T
AS
Address Setup Time (16 Mode)
5
5
10
ns
T
AH
Address Hold Time (16 Mode)
0
0
0
ns
T
CS
Chip Select Width (16 Mode)
100
50
30
ns
T
RD
IOR# Strobe Width (16 Mode)
100
50
30
ns
T
DY
Read Cycle Delay (16 Mode)
100
50
30
ns
T
RDV
Data Access Time (16 Mode)
75
50
25
ns
T
DD
Data Disable Time (16 Mode)
0
30
0
20
0
20
ns
T
WR
IOW# Strobe Width (16 Mode)
100
50
30
ns
T
DY
Write Cycle Delay (16 Mode)
100
50
30
ns
T
DS
Data Setup Time (16 Mode)
25
15
12
ns
T
DH
Data Hold Time (16 Mode)
3
3
5
ns
T
ADS
Address Setup (68 Mode)
5
5
10
ns
T
ADH
Address Hold (68 Mode)
0
0
0
ns
T
RWS
R/W# Setup to CS# (68 Mode)
10
10
10
ns
T
RDA
Read Data Access (68 mode)
75
50
25
ns
T
RDH
Read Data Disable Time (68 mode)
30
20
20
ns
T
WDS
Write Data Setup (68 mode)
25
15
12
ns
T
WDH
Write Data Hold (68 Mode)
3
3
5
ns
T
RWH
CS# De-asserted to R/W# De-asserted (68
Mode)
10
10
10
ns
T
CSL
CS# Width (68 Mode)
100
50
30
ns
T
CSD
CS# Cycle Delay (68 Mode)
100
50
30
ns
T
WDO
Delay From IOW# To Output
150
75
50
ns
T
MOD
Delay To Set Interrupt From MODEM Input
150
75
50
ns
T
RSI
Delay To Reset Interrupt From IOR#
150
75
50
ns
T
SSI
Delay From Stop To Set Interrupt
1
1
1
Bclk
相關(guān)PDF資料
PDF描述
XR16L580IM SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
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