參數(shù)資料
型號(hào): XR16L580IM
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
中文描述: 1 CHANNEL(S), 3.125M bps, SERIAL COMM CONTROLLER, PQFP48
封裝: 7 X 7 MM, 1 MM HEIGHT, TQFP-48
文件頁(yè)數(shù): 4/47頁(yè)
文件大?。?/td> 285K
代理商: XR16L580IM
XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
á
REV. 1.2.0
4
N
OTE
:
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
RTS#
21
32
O
UART Request-to-Send (active low) or general purpose output. This output must
be asserted prior to using auto RTS flow control, see EFR[6], MCR[1] and
IER[6].
CTS#
24
38
I
UART Clear-to-Send (active low) or general purpose input. It can be used for
auto CTS flow control, see EFR[7], MSR[4] and IER[7]. This input should be con-
nected to VCC when not used.
DTR#
22
33
O
UART Data-Terminal-Ready (active low) or general purpose output.
DSR#
25
39
I
UART Data-Set-Ready (active low) or general purpose input. This input should
be connected to VCC when not used. This input has no effect on the UART.
CD#
26
40
I
UART Carrier-Detect (active low) or general purpose input. This input should be
connected to VCC when not used. This input has no effect on the UART.
RI#
27
41
I
UART Ring-Indicator (active low) or general purpose input. This input should be
connected to VCC when not used. This input has no effect on the UART.
ANCILLARY SIGNALS
XTAL1
10
14
I
Crystal or external clock input. This input is not 5V tolerant.
XTAL2
11
15
O
Crystal or buffered clock output. This output may be use to drive a clock buffer
which can drive other device(s).
PwrSave
9
13
I
Power-Save (active high). This feature isolates the L580’s data bus interface from
the host preventing other bus activities that cause higher power drain during
sleep mode. See Sleep Mode with Auto Wake-up and Power-Save Feature sec-
tion for details. This pin has an internal pull-down resistor in the 48-TQFP pack-
age. The 32-QFN package does not have this pull-down resistor.
16/68#
2
1
I
Intel or Motorola Bus Select. This pin has an internal pull-up resistor in the 48-
TQFP package. The 32-QFN package does not have this resistor.
When 16/68# pin is at logic 1, 16 or Intel Mode, the device will operate in the Intel
bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will operate in the
Motorola bus type of interface.
RESET
(RESET#)
23
35
I
When 16/68# pin is at logic 1 for Intel bus interface, this input becomes RESET
(active high). When 16/68# pin is at logic 0 for Motorola bus interface, this input
becomes RESET# (active low).
A 40 ns minimum active pulse on this pin will reset the internal registers and all
outputs of the UART. The UART transmitter output will be held at logic 1, the
receiver input will be ignored and outputs are reset during reset period (see
UART Reset Conditions).
VCC
28
42
Pwr 2.25V to 5.5V power supply. All input pins, except XTAL1, are 5V tolerant.
GND
13
18
Pwr Power supply common, ground.
NC
15, 16
5,6,9,10,
12,17,20-
25,29,31,
34,36,37,
48
-
No Connects. Please note that in Motorola mode, the IOR# pin becomes an NC
pin.
Pin Descriptions
N
AME
32-QFN
P
IN
#
48-TQFP
PIN#
T
YPE
D
ESCRIPTION
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