REV. 1.4.2 2.0 FUNCTIONAL DESCRIPTIONS 2.1 CPU Interface T" />
參數(shù)資料
型號: XR16L580IMTR-F
廠商: Exar Corporation
文件頁數(shù): 48/49頁
文件大?。?/td> 0K
描述: IC UART FIFO 16B 48TQFP
標(biāo)準(zhǔn)包裝: 1,500
特點(diǎn): *
通道數(shù): 1,UART
FIFO's: 16 字節(jié)
規(guī)程: RS232,RS422
電源電壓: 2.25 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 帶卷 (TR)
XR16L580
8
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
REV. 1.4.2
2.0 FUNCTIONAL DESCRIPTIONS
2.1
CPU Interface
The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and
write transactions. The L580 data interface supports the Intel compatible types of CPUs and it is compatible to
the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data bus
transaction. Each bus cycle is asynchronous using CS#, IOR# and IOW# or R/W# inputs. A typical data bus
interconnection for Intel and Motorola mode is shown in Figure 3.
FIGURE 3. XR16L580 TYPICAL INTEL/MOTOROLA DATA BUS INTERCONNECTIONS
VCC
A0
A1
A2
UART_CS#
IOR#
IOW#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
CS#
D0
D1
D2
D3
D4
D5
D6
D7
IOR#
IOW#
UART_INT
INT
Serial Interface of
RS-232 or RS-422
Intel Data Bus Interconnections
GND
UART_RESET
RESET
16/68#
RI#
CD#
DSR#
CTS#
RTS#
DTR#
RX
TX
PwrSave
VCC
A0
A1
A2
UART_CS#
R/W#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
CS#
D0
D1
D2
D3
D4
D5
D6
D7
IOR#
IOW#
UART_IRQ#
INT
Serial Interface of
RS-232 or RS-422
Motorola Data Bus Interconnections
GND
UART_RESET#
RESET
RI#
CD#
DSR#
CTS#
RTS#
DTR#
RX
TX
PwrSave
VCC
16/68#
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