REV. 1.1.1 RXA 4 5 D2 I UART channel A Receive Data or infrared receive data. Norm" />
參數(shù)資料
型號: XR16M752IL32-F
廠商: Exar Corporation
文件頁數(shù): 51/54頁
文件大?。?/td> 0K
描述: IC UART FIFO 64B DUAL 32QFN
標(biāo)準包裝: 490
特點: *
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 1.62 V ~ 3.63 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(5x5)
包裝: 托盤
XR16M752/XR68M752
6
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.1.1
RXA
4
5
D2
I
UART channel A Receive Data or infrared receive data.
Normal receive data input must idle HIGH. The infrared
receiver pulses typically idles at LOW but can be inverted
by software control prior going in to the decoder, see
MCR[6]. If this pin is not used, tie it to VCC or pull it high
via a 100k ohm resistor.
RTSA#
23
33
D5
O
UART channel A Request-to-Send (active low) or general
purpose output. This output must be asserted prior to
using auto RTS flow control, see EFR[6] and IER[6]. For
auto RS485 half-duplex direction control, see DLD[6].
CTSA#
25
38
A5
I
UART channel A Clear-to-Send (active low) or general
purpose input. It can be used for auto CTS flow control,
see EFR[7] and IER[7]. This input should be connected to
VCC or GND when not used.
DTRA#
-
34
A7
O
UART channel A Data-Terminal-Ready (active low) or
general purpose output. If it is not used, leave it uncon-
nected.
DSRA#
-
39
B6
I
UART channel A Data-Set-Ready (active low) or general
purpose input. This input should be connected to VCC or
GND when not used.
CDA#
-
40
C5
I
UART channel A Carrier-Detect (active low) or general
purpose input. This input should be connected to VCC or
GND when not used.
RIA#
-
41
A4
I
UART channel A Ring-Indicator (active low) or general
purpose input. This input should be connected to VCC or
GND when not used.
OP2A#
-
32
C6
O
Output Port 2 Channel A - The output state is defined by
the user and through the software setting of MCR[3].
INTA is set to the active mode and OP2A# output LOW
when MCR[3] is set to a logic 1. INTA is set to the three
state mode and OP2A# output HIGH when MCR[3] is set
to a logic 0. See MCR[3]. If INTA is used, this output
should not be used as a general output else it will disturb
the INTA output functionality.
TXB
6
8
D1
O
UART channel B Transmit Data or infrared encoder data.
Standard transmit and receive interface is enabled when
MCR[6] = 0. In this mode, the TX signal will be HIGH dur-
ing reset or idle (no data). Infrared IrDA transmit and
receive interface is enabled when MCR[6] = 1. In the
Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is LOW. If it is not used, leave
it unconnected.
RXB
3
4
C3
I
UART channel B Receive Data or infrared receive data.
Normal receive data input must idle HIGH. The infrared
receiver pulses typically idles at logic 0 but can be
inverted by software control prior going in to the decoder,
see MCR[6]. If this pin is not used, tie it to VCC or pull it
high via a 100k ohm resistor.
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
49-STBGA
PIN #
TYPE
DESCRIPTION
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