參數(shù)資料
型號： XR16M780IL32-0B-EB
廠商： Exar Corporation
文件頁數(shù)： 31/58頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR16M780-B 32QFN
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16M780
37
REV. 1.0.0
1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO
MSR[4]: CTS Input Status
CTS# pin may function as automatic hardware flow control signal input if it is enabled and selected by Auto
CTS (EFR bit-7). Auto CTS Flow Control allows starting and stopping of local data transmissions based on the
modem CTS# signal. A HIGH on the CTS# pin will stop UART transmitter as soon as the current character has
finished transmission, and a LOW will resume data transmission. Normally MSR bit-4 bit is the complement of
the CTS# input. However in the loopback mode, this bit is equivalent to the RTS# bit in the MCR register. The
CTS# input may be used as a general purpose input when the modem interface is not used.
MSR[5]: DSR Input Status
Normally this bit is the complement of the DSR# input. In the loopback mode, this bit is equivalent to the DTR#
bit in the MCR register. The DSR# input may be used as a general purpose input when the modem interface is
not used.
MSR[6]: RI Input Status
Normally this bit is the complement of the RI# input. In the loopback mode this bit is equivalent to bit-2 in the
MCR register. The RI# input may be used as a general purpose input when the modem interface is not used.
MSR[7]: CD Input Status
Normally this bit is the complement of the CD# input. In the loopback mode this bit is equivalent to bit-3 in the
MCR register. The CD# input may be used as a general purpose input when the modem interface is not used.
4.10
Modem Status Register (MSR) - Write Only
This register provides the advanced features of XR16M780. Lower four bits of this register are reserved.
Writing to the higher four bits enables additional functions.
MSR[3:0]: Reserved
MSR[4]: Enable/Disable Transmitter (Requires EFR[4] = 1)
Logic 0 = Enable Transmitter (default).
Logic 1 = Disable Transmitter.
MSR[5]: Enable/Disable Receiver (Requires EFR[4] = 1)
Logic 0 = Enable Receiver (default).
Logic 1 = Disable Receiver.
MSR[6]: Enable/Disable 9-bit mode (Requires EFR[4] = 1)
Logic 0 = Normal 8-bit mode (default).
Logic 1 = Enable 9-bit or Multidrop mode.
MSR[7]: Enable/Disable fast IR mode (Requires EFR[4] = 1)
The M780 supports the new fast IR transmission with data rate up to 1.152 Mbps.
Logic 0 = IrDA version 1.0, 3/16 pulse ratio, data rate up to 115.2 Kbps (default).
Logic 1 = IrDA version 1.1, 1/4 pulse ratio, data rate up to 1.152 Mbps. For more IR mode information, please
4.11
Scratch Pad Register (SPR) - Read/Write
This is a 8-bit general purpose register for the user to store temporary data. The content of this register is
preserved during sleep mode but becomes 0xFF (default) after a reset or a power off-on cycle.
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