REV. 1.0.1 LCR[6]: Transmit Break Enable When enabled, the Break control b" />
參數(shù)資料
型號： XR16M781IB25-F
廠商： Exar Corporation
文件頁數(shù)： 26/52頁
文件大小： 0K
描述： IC UART FIFO 64B 25BGA
標(biāo)準(zhǔn)包裝： 714
特點： *
通道數(shù)： 1，UART
FIFO's： 64 字節(jié)
規(guī)程： RS232，RS422，RS485
電源電壓： 1.62 V ~ 3.63 V
帶自動流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類型： 表面貼裝
封裝/外殼： 25-WFBGA
供應(yīng)商設(shè)備封裝： 25-BGA（3x3）
包裝： 托盤
其它名稱： 1016-1462
XR16M781IB25-F-ND
XR16M781
32
1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE
REV. 1.0.1
LCR[6]: Transmit Break Enable
When enabled, the Break control bit causes a break condition to be transmitted (the TX output is forced to a
“space’, logic 0, state). This condition remains, until disabled by setting LCR bit-6 to a logic 0.
Logic 0 = No TX break condition. (default)
Logic 1 = Forces the transmitter output (TX) to a “space”, logic 0, for alerting the remote receiver of a line
break condition.
LCR[7]: Baud Rate Divisors Enable
Baud rate generator divisor (DLL/DLM/DLD) enable.
Logic 0 = Data registers are selected. (default)
Logic 1 = Divisor latch registers are selected.
4.7
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output HIGH (default).
Logic 1 = Force DTR# output LOW.
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
Logic 0 = Force RTS# output HIGH (default).
Logic 1 = Force RTS# output LOW. It is required to start Auto RTS Flow Control.
MCR[2]: Reserved
OP1# is not available as an output pin on the M781. But it is available for use during Internal Loopback Mode.
In the Loopback Mode, this bit is used to write the state of the modem RI# interface signal.
MCR[3]: INT Output Enable
Enable or disable INT outputs to become active or in three-state. This bit is also used to control the OP2#
signal during internal loopback mode.
Logic 0 = INT output disabled (three state). During internal loopback mode, OP2# is HIGH.
Logic 1 = INT output enabled (active). During internal loopback mode, OP2# is LOW.
TABLE 11: INT OUTPUT MODES
BIT-3
INT OUTPUT
0
Three-State
1
Active
MCR
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