REV. 1.0.3 2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO 3.0 UART INTERNAL REGISTERS Each UART channel in the V554 has its own set" />
參數(shù)資料
型號: XR16V554IV-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 11/43頁
文件大小: 0K
描述: EVAL BOARD FOR XR16V554 64LQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR16V554/554D
19
REV. 1.0.3
2.25V TO 3.6V QUAD UART WITH 16-BYTE FIFO
3.0 UART INTERNAL REGISTERS
Each UART channel in the V554 has its own set of configuration registers selected by address lines A0, A1
and A2 with a specific channel selected (See Table 1 and Table 2). The complete register set is shown on
TABLE 7: UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 0 0
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 0 0
DLL - Divisor LSB
Read/Write
LCR[7] = 1, LCR
≠ 0xBF
0 0 1
DLM - Divisor MSB
Read/Write
0 0 1
IER - Interrupt Enable Register
Read/Write
LCR[7] = 0
0 1 0
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read-only
Write-only
0 1 1
LCR - Line Control Register
Read/Write
1 0 0
MCR - Modem Control Register
Read/Write
LCR[7] = 0
1 0 1
LSR - Line Status Register
Read-only
1 1 0
MSR - Modem Status Register
Read-only
1 1 1
SPR - Scratch Pad Register
Read/Write
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