參數(shù)資料
型號(hào)： XR17C154
廠商： Exar Corporation
英文描述： Tip, Offset Tapered Needle, 1mm Diameter
中文描述： 四5V的PCI總線的UART
文件頁(yè)數(shù)： 61/62頁(yè)
文件大?。?/td> 721K
代理商： XR17C154
á
XR17C154
5V PCI BUS QUAD UART
PRELIMINARY
REV. P1.3.0
II
4.2.3 Transmitter Operation in FIFO mode ..................................................................................... 26
4.2.4 Auto RS485 Operation .......................................................................................................... 26
Figure 10. Transmitter Operation in non-FIFO Mode ....................................................................... 26
Figure 11. Transmitter Operation in FIFO and Flow Control Mode ................................................ 26
4.3 R
ECEIVER
.................................................................................................................................................................. 27
4.3.1 Receive Holding Register (RHR) - Read-Only ..................................................................... 27
4.3.2 Receiver Operation in non-FIFO Mode ................................................................................ 27
Figure 12. Receiver Operation in non-FIFO Mode ............................................................................ 27
4.3.3 Receiver Operation with FIFO ............................................................................................... 28
4.4 A
UTOMATIC
H
ARDWARE
(RTS/CTS
OR
DTR/DSR) F
LOW
C
ONTROL
O
PERATION
......................................................... 28
Figure 13. Receiver Operation in FIFO and Flow Control Mode ..................................................... 28
T
ABLE
10: A
UTO
RTS/CTS
OR
DTR/DSR F
LOW
C
ONTROL
S
ELECTION
.................................................. 28
Figure 14. Auto RTS/DTR and CTS/DSR Flow Control Operation .................................................. 29
4.5 I
NFRARED
M
ODE
......................................................................................................................................................... 30
Figure 15. Infrared Transmit Data Encoding and Receive Data Decoding .................................... 30
4.6 I
NTERNAL
L
OOPBACK
.................................................................................................................................................. 31
4.7 UART CHANNEL CONFIGURATION REGISTERS AND ADDRESS DECODING ................................................. 31
Figure 16. Internal Loop Back ............................................................................................................ 31
T
ABLE
11: UART CHANNEL CONFIGURATION REGISTERS ........................................................... 32
T
ABLE
12: UART CHANNEL CONFIGURATION REGISTERS DESCRIPTION. S
HADED
BITS
ARE
ENABLED
BY
EFR B
IT
-4. ........................................................................................................................ 33
4.8 R
EGISTERS
................................................................................................................................................................. 34
4.8.1 Receive Holding Register (RHR) - Read-Only ...................................................................... 34
4.8.2 Transmit Holding Register (THR) - Write-Only ...................................................................... 34
4.8.3 Baud Rate Generator Divisors (DLL and DLM) - Read/Write ................................................ 34
4.8.4 Interrupt Enable Register (IER) - Read/Write ........................................................................ 34
IER versus Receive FIFO Interrupt Mode Operation ....................................................................................... 34
IER versus Receive/Transmit FIFO Polled Mode Operation ............................................................................ 34
4.8.5 Interrupt Status Register (ISR) - Read-Only .......................................................................... 35
T
ABLE
13: I
NTERRUPT
S
OURCE
AND
P
RIORITY
L
EVEL
............................................................................. 36
4.8.6 FIFO Control Register (FCR) - Write-Only ............................................................................ 37
T
ABLE
14: T
RANSMIT
AND
R
ECEIVE
FIFO T
RIGGER
L
EVEL
S
ELECTION
.................................................... 38
4.8.7 Line Control Register (LCR) - Read/Write ............................................................................. 39
4.8.8 Modem Control Register (MCR) - Read/Write ....................................................................... 40
T
ABLE
15: P
ARITY
SELECTION
................................................................................................................ 40
4.8.9 Line Status Register (LSR) - Read/Only ................................................................................ 41
4.8.10 Modem Status Register (MSR) - Read-Only ....................................................................... 42
4.8.11 Modem Status Register (MSR) - Write-Only ....................................................................... 43
T
ABLE
16: A
UTO
RS485 H
ALF
-
DUPLEX
D
IRECTION
C
ONTROL
D
ELAY
FROM
T
RANSMIT
-
TO
-R
ECEIVE
........ 43
4.8.12 SCRATCH PAD REGISTER (SPR) - Read/Write ............................................................... 44
4.8.13 FEATURE CONTROL REGISTER (FCTR) - Read/Write ................................................... 44
4.8.14 Enhanced Feature Register (EFR) - Read/Write ................................................................. 45
T
ABLE
17: 16 S
ELECTABLE
H
YSTERESIS
L
EVELS
W
HEN
T
RIGGER
T
ABLE
-D
IS
S
ELECTED
....................... 45
T
ABLE
18: S
OFTWARE
F
LOW
C
ONTROL
F
UNCTIONS
................................................................................ 46
4.8.15 TXCNT[7:0]: Transmit FIFO Level Counter - Read-Only ..................................................... 47
4.8.16 TXTRG [7:0]: Transmit FIFO Trigger Level - Write-Only ..................................................... 47
4.8.17 RXCNT[7:0]: Receive FIFO Level Counter - Read-Only ..................................................... 47
4.8.18 RXTRG[7:0]: Receive FIFO Trigger Level - Write-Only ....................................................... 47
T
ABLE
19: UART RESET CONDITIONS .............................................................................................. 48
5.0 programming Examples ...................................................................................................................... 49
5.1 U
NLOADING
R
ECEIVE
D
ATA
U
SING
THE
S
PECIAL
R
ECEIVE
FIFO D
ATA
WITH
S
TATUS
................................................... 49
ABSOLUTE MAXIMUM RATINGS ................................................................................ 50
ELECTRICAL CHARACTERISTICS .............................................................................. 50
DC ELECTRICAL CHARACTERISTICS FOR 5V SIGNALING ............................................................ 50
AC ELECTRICAL CHARACTERISTICS
FOR
5V SIGNALING .............................................................. 51
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