- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3762 > XR19L400IL40TR-F (Exar Corporation)IC UART/TXRX RS485 40QFN PDF資料下載
參數(shù)資料
| 型號： | XR19L400IL40TR-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 17/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART/TXRX RS485 40QFN |
| 標準包裝： | 3,000 |
| 特點： | * |
| 通道數(shù)： | 1，UART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 3.3V，5V |
| 帶自動流量控制功能： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調制解調器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 40-QFN 裸露焊盤（6x6） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
XR19L400
24
SINGLE CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
REV. 1.0.3
IER[4]: Sleep Mode Enable (requires EFR bit-4 = 1)
Logic 0 = Disable Sleep Mode (default).
Logic 1 = Enable Sleep Mode. See Sleep Mode section for further details.
IER[5]: Xoff Interrupt Enable (requires EFR bit-4=1)
Logic 0 = Disable the software flow control, receive Xoff interrupt (default).
Logic 1 = Enable the software flow control, receive Xoff interrupt. See Software Flow Control section for
details.
IER[7:6]: Reserved
For normal operation, these bits should remain at logic 0.
4.4
Interrupt Status Register (ISR) - Read-Only
The UART provides multiple levels of prioritized interrupts to minimize external software interaction. The
Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the
ISR will give the user the current highest pending interrupt level to be serviced, others are queued up to be
serviced next. No other interrupts are acknowledged until the pending interrupt is serviced. The Interrupt
Source Table, Table 7, shows the data values (bit 0-5) for the interrupt priority levels and the interrupt sources
associated with each of these interrupt levels.
4.4.1
Interrupt Generation:
LSR is by any of the LSR bits 1, 2, 3 and 4.
RXRDY is by RX trigger level.
RXRDY Time-out is by a 4-char plus 12 bits delay timer.
TXRDY is by TX trigger level or TX FIFO empty (or transmitter empty in auto half-duplex control).
MSR is by any of the MSR bits 0, 1, 2 and 3.
Receive Xoff is by detection of a Xoff character.
Wake-up Indicator is when the UART comes out of sleep mode.
4.4.2
Interrupt Clearing:
LSR interrupt is cleared by a read to the LSR register.
RXRDY interrupt is cleared by reading data until FIFO falls below the trigger level.
RXRDY Time-out interrupt is cleared by reading RHR.
TXRDY interrupt is cleared by a read to the ISR register or writing to THR.
MSR interrupt is cleared by a read to the MSR register.
Xoff interrupt is cleared by a read to ISR or when Xon character(s) is received.
Wake-up Indicator is cleared by a read to the ISR register.
相關PDF資料 |
PDF描述 |
|---|---|
| XR16M680IB25-F | IC UART FIFO 32B 25BGA |
| XR16M670IB25-F | IC UART FIFO 32B 25BGA |
| XR20M1170IL16TR-F | IC UART FIFO I2C/SPI 64B 16QFN |
| XR16M580IB25-F | IC UART FIFO 16B 25BGA |
| XR16M570IB25-F | IC UART FIFO 16B 25BGA |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XR19L402 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER |
| XR19L402_09 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER |
| XR19L402IL48 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER |
| XR19L402IL48-0B-EB | 功能描述:界面開發(fā)工具 Supports L402 48 pin QFN, PCI Interface RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| XR19L402IL48-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。