The IRQ# interrupt output changes according to th" />
參數(shù)資料
型號(hào): XR20M1172G28-0B-EB
廠商: Exar Corporation
文件頁(yè)數(shù): 4/55頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR20M1172 28TSSOP
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,UART
嵌入式:
已用 IC / 零件: XR20M1172
主要屬性: 2 通道
次要屬性: I²C & SPI 接口
已供物品:
其它名稱: 1016-1623
XR20M1172G28-0B-EB-ND
XR20M1172
12
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
REV. 1.2.0
2.4
IRQ# Output
The IRQ# interrupt output changes according to the operating mode and enhanced features setup. Table 4
and 5 summarize the operating behavior for the transmitter and receiver. Also see Figures 21 through 35.
The Non-FIFO mode is enabled by default for 16450 compatibility. For normal operation, the FIFO mode must
be enabled.
TABLE 4: IRQ# PIN OPERATION FOR TRANSMITTER
Auto RS485
Mode
FCR BIT-0 = 0
(NON-FIFO MODE)
FCR BIT-0 = 1
(FIFO MODE)
IRQ# Pin
NO
HIGH = a byte in THR
LOW = THR empty
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or FIFO empty
IRQ# Pin
YES
HIGH = a byte in THR
LOW = transmitter empty
HIGH = FIFO above trigger level
LOW = FIFO below trigger level or transmitter empty
TABLE 5: IRQ# PIN OPERATION FOR RECEIVER
FCR BIT-0 = 0
(NON-FIFO MODE)
FCR BIT-0 = 1
(FIFO MODE)
IRQ# Pin
HIGH = no data
LOW = 1 byte
HIGH = FIFO below trigger level
LOW = FIFO above trigger level
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