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參數(shù)資料
| 型號： | XR20M1280L24-0A-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 37/63頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR20M1280 |
| 產(chǎn)品培訓(xùn)模塊： | XR21V141x Full-Speed USB UART Family UARTs with Integrated Level Shifters |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 接口，UART |
| 已用 IC / 零件： | XR20M1280L24 |
| 已供物品： | 板 |
| 其它名稱： | 1016-1632 |
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XR20M1280
42
I2C/SPI UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
REV. 1.0.0
3.11
Special Function Register (SFR) - Write Only
This register provides access to some of the advanced features of XR20M1280.
SFR[0]: Enable GPIO Registers (Requires EFR[4] = 1)
Logic 0 = GPIO control and status registers are not enabled.
Logic 1 = GPIOLVL register is accessible at SPR register location. GPIOINT, GPIO3T, GPIOINV, GPIOSEL
registers are accessible at XON1, XON2, XOFF1, and XOFF2 register locations.
SFR[1]: GPIO[15:8] or GPIO[7:0] Select (Requires EFR[4] = 1)
Logic 0 = GPIOLVL, GPIOINT, GPIO3T, GPIOINV and GPIOSEL registers will control and report the status
of GPIO[7:0].
Logic 1 = GPIOLVL, GPIOINT, GPIO3T, GPIOINV and GPIOSEL registers will control and report the status
of GPIO[15:8].
SFR[2]: GPIO Interrupt Enable (Requires EFR[4] = 1)
Logic 0 = GPIO interrupt is disabled.
Logic 1 = GPIO interrupt is enabled. GPIOs that have been configured as inputs can generate GPIO
interrupts if the bit is enabled in the GPIOINT register. The polarity of the GPIO interrupt is selected via the
GPIOINV register.
SFR[3]: Enable/Disable fast IR mode (Requires EFR[4] = 1)
The M1280 supports the new fast IR transmission with data rate up to 1.152 Mbps.
Logic 0 = IrDA version 1.0, 3/16 pulse ratio, data rate up to 115.2 Kbps (default).
Logic 1 = IrDA version 1.1, 1/4 pulse ratio, data rate up to 1.152 Mbps. For more IR mode information, please
SFR[4]: Enable/Disable Transmitter (Requires EFR[4] = 1)
Logic 0 = Enable Transmitter (default).
Logic 1 = Disable Transmitter.
SFR[5]: Enable/Disable Receiver (Requires EFR[4] = 1)
Logic 0 = Enable Receiver (default).
Logic 1 = Disable Receiver.
SFR[6]: Enable/Disable 9-bit mode (Requires EFR[4] = 1)
For the 9-bit mode information, See ”Section 1.17, Normal Multidrop (9-bit) Mode - Receiver” on page 23.
Logic 0 = Normal 8-bit mode (default).
Logic 1 = Enable 9-bit or Multidrop mode.
SFR[7]: TX Address Bit (Requires EFR[4] = 1)
This bit requires that forced "0" parity is enabled (LCR[5:3]=’111’). If this bit is enabled, the 9th bit of the next
byte written to THR will be a ’1’. This bit resets after a write to THR. For the 9-bit mode information, See
Logic 0 = Value of 9th bit will be ’0’ (default).
Logic 1 = Value of 9th bit will be ’1’.
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相關(guān)代理商/技術(shù)參數(shù) |
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| XR20M1280L24-0B-EB | 功能描述:UART 接口集成電路 EVAL F/ M1280 QFN24 SPI INTERFACE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1280L32-0A-EB | 功能描述:UART 接口集成電路 EVAL F/M1280 QFN32 I2C INTERFACE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1280L32-0B-EB | 功能描述:UART 接口集成電路 EVAL F/M1280 QFN32 SPI INTERFACE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1280L40-0A-EB | 功能描述:UART 接口集成電路 EVAL F/M1280 QFN40 I2C INTERFACE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1280L40-0B-EB | 功能描述:UART 接口集成電路 EVAL F/M1280 QFN40 SPI INTERFACE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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