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參數(shù)資料
| 型號： | XR2211CP |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 15/24頁 |
| 文件大?。?/td> | 242K |
| 代理商： | XR2211CP |
XR-2211
15
Rev. 3.01
Loop
Phase
Detect
11
C
220pF
5%
R
1
200K
1%
8
FSK
Comp.
V
CC
7
Internal
Reference
0.1
μ
F
10
VCO
14
13
12
R
0
20K
1%
C
0
50nF
5%
Rx
5K
2
0.1
μ
F
Input
Tone
Lock
Detect
Comp.
Tune
6 LDOQ
RL2
5.1K
RL3
5.1K
Logic Output
5 LDOQN
3
C
80nF
R
470K
Quad
Phase
Detect
Figure 12. Circuit Connection for Tone Detection
V
CC
Fine
+
+
FSK Decoding with Carrier Detect
The lock detect section of XR-2211 can be used as a
carrier detect option for FSK decoding. The
recommended circuit connection for this application is
shown in Figure 11.The open collector lock detect output,
pin 6, is shorted to data output (pin 7). Thus, data output
will be disabled at “l(fā)ow” state, until there is a carrier within
the detection band of the PLL and the pin 6 output goes
“high” to enable the data output.
Note:
Data Output is “Low” When No Carrier is Present.
The minimum value of the lock detect filter capacitance
C
D
is inversely proportional to the capture range, + fc.
This is the range of incoming frequencies over which the
loop can acquire lock and is always less than the tracking
range. It is further limited by C
1
. For most applications, fc
> f/2. For R
D
= 470K , the approximate minimum value
of C
D
can be determined by:
C
D
16
f
C in F and f in Hz.
C in F and f in Hz.
With values of C
D
that are too small, chatter can be
observed on the lock detect output as an incoming signal
frequency
Excessively large values of C
D
will slow the response time
of the lock detect output. For Caller I.D. applications
choose C
D
= 0.1 F.
approaches
the
capture
bandwidth.
Tone Detection
Figure 12shows the generalized circuit connection for
tone detection. The logic outputs, LDOQN and LDOQ at
pins 5 and 6 are normally at “high” and “l(fā)ow” logic states,
respectively. When a tone is present within the detection
band of the PLL, the logic state at these outputs become
reversed for the duration of the input tone. Each logic
output can sink 5mA of load current.
Both outputs at pins 5 and 6 are open collector type
stages, and require external pull-up resistors R
L2
and
R
L3
, as shown in Figure 12.
With reference to Figure 3 and Figure 12 the functions of
the external circuit components can be explained as
follows: R
0
and C
0
set VCO center frequency; R
1
sets the
detection bandwidth; C
1
sets the low pass-loop filter time
constant and the loop damping factor.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XR2211D | FSK Demodulator/Tone Decoder(242.76 k ) |
| XR2228 | Monolithic Multiplier/Detector |
| XR-2228 | Monolithic Multiplier/Detector |
| XR-2228CN | Monolithic Multiplier/Detector |
| XR-2228CP | Monolithic Multiplier/Detector |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR-2211CP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASK/FSK Demodulator |
| XR2211D | 制造商:EXAR 制造商全稱:EXAR 功能描述:FSK Demodulator/Tone Decoder(242.76 k ) |
| XR-2211D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASK/FSK Demodulator |
| XR-2211ID | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASK/FSK Demodulator |
| XR2211M | 制造商:EXAR 制造商全稱:EXAR 功能描述: |
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