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參數(shù)資料
| 型號： | XRD54L12 |
| 廠商： | Exar Corporation |
| 英文描述： | 3V, Low Power, Voltage Output Serial 12-Bit DAC(3V 低功耗 電壓輸出串行12位D/A轉(zhuǎn)換器) |
| 中文描述： | 3V的，低功耗，電壓輸出，串行12位DAC（3V的低功耗電壓輸出串行12位的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 1012K |
| 代理商： | XRD54L12 |
XRD54L08/L10/L12
9
Rev. 1.30
Figure 6. Shift Register Format
DOUT
SDIN
X
X
X
X
DAC
MSB
n
TheDACsareprogrammedbya16bitwordofserialdata.
TheformatoftheserialinputregisterisshowninFigure 6.
The leading 4 bits are not used to update the DAC. If the
DAC is not daisy-chained then only a 12 bit serial word is
needed to program the DAC. The next 8, 10 or 12 bits
afterthe4leadingbitsaredatabits. TheXRD54L08’sfirst
8bitsarevaliddataandthetrailing4bitsmust beset to0.
Figure 7
demonstrates the 16 bit digital word for the 8,
10,12 bit DACs.
Part
Leading
Unused
Bits
Data Bits
MSB
LSB
Trailing
“0”
Bits
XRD54L12
XXXX
XXXXXXXX
None
XRD54L10
XXXX
XXXXXXXX
00
XRD54L08
XXXX
XXXXXXXX
0000
Table 2. 16-Bit Digital Word Register for XRD54L08,
XRD54L10, XRD54L12.
SCLKshouldbeheldlowwhenCStransitionslow. Datais
clocked in on the rising edge of SCLK when CS is low.
SDIN data is heldin a 16bit serialshift register. TheDAC
is updated with the data bits on the rising edge of CS.
When CS is high
data is
XRD54L08/L10/L12.
not
shifted into
the
Daisy-Chaining
Thedigitaloutputport(DOUT)hasa4mAdriveforgreater
fan-out capability when daisy-chaining.
cascading of multiple DACs with the same serial data
stream. ThedataatSDINappearsatDOUTafter16clock
cyclesplus oneclock width(t
CH
) anda propagationdelay
(t
DO
). DOUT remainsinthe stateof thelastdatabitwhen
CS is high. DOUT changes on the falling edge of SCLK
when CS is low.
DOUT allows
Any number of DACs can be connected in this way by
connecting DOUT of one DAC to SDIN of the next DAC.
AC
FT
Feedthrough (DAC Code = 0)
AC Feedthrough from V
REFIN
to V
OUT
is minimized with
low impedance grounding as shown in
Figure 7
. If the
DAC data is set to all “0”s then V
OUT
is a function of the
divider between the DAC string impedance and ground
impedance.
See the Power Supply and Grounding
section
for
recommendations.
feedthrough for a 1kHz 2Vpp signal with code = 0 is
-80dB.
The
typical
AC
Figure 7. AC
FT
Feedthrough Equivalent
Circuit, DAC Code =0
V
REFIN
XRD54L08/L10/L12
V
OUT
GND
RGND
Analog GND
R
IN
--
+
Compatible with MAX515 & MAX539
The XRD54L08/L10/L12 family of DACs are functionally
campatible with the MAX515 & MAX539 while providing
significant improvements.
DACs have lower power, faster serial ports, and a
constant reference impedance to minimize the reference
drivingrequirementsandmaximizesystemlinearitywhile
The XRD54L08/L10/L12
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