參數(shù)資料
型號(hào): XRD64L42AIV
廠商: EXAR CORP
元件分類: ADC
英文描述: Dual 10-Bit 40MSPS CMOS ADC
中文描述: 2-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP64
封裝: TQFP-64
文件頁數(shù): 10/16頁
文件大?。?/td> 212K
代理商: XRD64L42AIV
XRD64L42
10
Rev. P2.10
APPLICATION SECTION
Voltage References
The top ladder voltage for the XRD64L42 can be
provided from an internal bandgap reference. The
bandgap reference and its feedback path, Pins 1 and
2 respectively, can be used to set the voltage for
VRHF. Select Rf and Ri (if gain is necessary) so that
VRHF=VBG(1+Rf/Ri). The internal bandgap voltage
is 1.24 volts. The XRD64L42 has a low impedence
ladder, therefore, the typical value for Rf and Ri is 10K
(Rf and Ri are recommended to be greater than
5K).See Figure 1. for a simplified diagram.
VBG
Bandgap
VFBK
VRHF
VRLF
XRD64L42
Resistive Ladder
Rf
Ri
External voltage references can be forced at VRHF and
VRLF. If VRHF and VRLF are driven externally, VFBK
should be connected to AVdd, which tri-states the
bandgap reference. Direct inputs or inputs driven by
external amplifiers can be used to drive the ladder
reference voltages of the XRD64L42. See Figure 2. for
a simplified diagram.
Figure 2. Voltage Reference Generated from the
Internal Bandgap Voltage
Figure 3. Voltage Reference Provided by an Ex-
ternal Source as Direct Inputs
VBG
Bandgap
VFBK
VRHF
VRLF
XRD64L42
Resistive Ladder
AVdd
Direct Input
Direct Input
Single-Ended Inputs
The XRD64L42 can be used in either single-ended or
differential input mode. For differential inputs, see the
Differential Inputs Section. Single-ended inputs mini-
mize the amount of external components necessary to
interface with the XRD64L42. The common inputs,
VINA(-) and VINB(-) should be tied to ground. VINA(+)
and VINB(+) can be used to apply direct inputs to the
XRD64L42. Figure 3. is a simplied diagram for single-
ended inputs. Pin 15, DIFF should be held low to select
single-ended inputs.
Figure 4. Single-Ended Inputs for the XRD64L42
Input A
Input B
50
50
VINA(+)
VINA(-)
VINB(+)
VINB(-)
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