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參數(shù)資料
| 型號(hào)： | XRD64L43 |
| 廠商： | Exar Corporation |
| 英文描述： | Dual 10-Bit 40MSPS CMOS ADC |
| 中文描述： | 雙10位40MSPS的CMOS模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大小： | 5651K |
| 代理商： | XRD64L43 |
XRD64L43
Preliminary
10
Rev. P1.00
APPLICATION SECTION
Voltage References
The top adder voltage for the XRD64L43 can be provided
from an nternal bandgap reference. The bandgap reference
and ts feedback path, Pins 1 and 2 respectively, can be used
to set the voltage for VRHF. Select Rf and Ri (if gain is
necessary) so that VRHF=VBG(1+Rf/Ri). The internal
bandgap voltage is 1.24 volts. The XRD64L43 has a low
impedence adder, therefore, the typical value for Rf and Ri
is 10K (Rf and Ri are recommended to be greater than
5K).See Figure 2. for a simplified diagram. Decoupling caps
on the sense inputs to AGND should be used to reduce
injectioin of high-frequency noise.
VBG
Bandgap
VFBK
VRHF
XRD64L43
Rf
Ri
Resistive Ladder
VRLS
VRHS
VRLF
External voltage references can be forced at VRHF and
VRLF. If VRHF and VRLF are driven externally, VFBK
should be connected to AVdd, which tri-states the
bandgap reference. Direct inputs or inputs driven by
external amplifiers can be used to drive the ladder
reference voltages of the XRD64L43. See Figure 3. for
a simplified diagram. The sense inputs are intended for
sensing purposes only and care must be taken to nsure that
no current flow be present in the sense lines.
Figure 2. Voltage Reference Generated from the
Internal Bandgap Voltage w/gain
Figure 3. Voltage Reference Provided by an Ex-
ternal Source as Direct Inputs
VBG
Bandgap
VFBK
VRHF
VRLF
XRD64L43
Resistive Ladder
AVdd
VRLS
VRHS
Single-Ended Inputs
The XRD64L43 can be used in either single-ended or
differential input mode. For differential inputs, see the
Differential Inputs Section. Single-ended inputs mini-
mize the amount of external components necessary to
interface with the XRD64L43. The common inputs,
VINA(-) and VINB(-) should be tied to ground. VINA(+)
and VINB(+) can be used to apply direct inputs to the
XRD64L43. Figure 4. is a simplied diagram for single-
ended inputs. Pin 16, DIFF should be held low to select
single-ended inputs.
Figure 4. Single-Ended Inputs for the XRD64L43
Input A
Input B
50
50
VINA(+)
VINA(-)
VINB(+)
VINB(-)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRD64L43AIV | 制造商:Exar Corporation 功能描述:ADC Dual SAR 40Msps 10-bit Parallel 64-Pin LQFP |
| XRD64L43AIV-F | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10 Bit40 MSPSADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| XRD64L43AIVTR-F | 制造商:Exar Corporation 功能描述:ADC Dual SAR 40Msps 10-bit Parallel 64-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XRD64L43AIVTR-F |
| XRD64L44 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Dual 10-Bit 50MSPS CMOS ADC |
| XRD64L44AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:Dual 10-Bit 50MSPS CMOS ADC |
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