參數(shù)資料
型號: XRK4991ACJ-5
廠商: EXAR CORP
元件分類: 時鐘及定時
英文描述: 3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
中文描述: 4991 SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32
封裝: PLASTIC, LCC-32
文件頁數(shù): 10/13頁
文件大?。?/td> 255K
代理商: XRK4991ACJ-5
XRK4991A
3.3V HIGH-SPEED (85 MHZ) PROGRAMMABLE SKEW CLOCK BUFFER
PRELIMINARY
xr
REV. P1.0.2
10
5.
For XRK4993-2 t
SKEW0
is measured with C
L
= 0pF; for C
L
= 20pF, t
SKEW0
= 0.35ns Max.
There are 2 classes of outputs: Nominal (multiple of t
U
delay), and Divided (QC[1:0] only in Divide-by-2 or Divide-by-4
mode).
t
DEV
is the output-to-output skew between any two devices operating under the same conditions (V
CC
, ambient temperature,
air flow, etc.)
8. t
LOCK
is the time that is required before synchronization is achieved. This specification is valid only after V
CC
is stable and
within normal operating limits. This parameter is measured from the application of a new signal or frequency at CLKIN or
FB_IN until tPD is within specified limits.
t
PD
is measured with CLKIN input rise and fall times (from 0.8V to 2V) of 1ns.
Measured at 2V.
Measured at 0.8V.
6.
7.
8.
9.
10.
11.
F
IGURE
4. AC T
EST
L
OADS
AND
W
AVEFORMS
150
V
CC
150
Output
20pF
LVTTL Output Waveform
2.0V
0.8V
t
ORISE
t
OFALL
t
PWH
t
PWL
LVTTL Input Test Waveform
2.0V
0.8V
<1ns
<1ns
3.0V
Vth = 1.5V
0V
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