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參數(shù)資料
| 型號： | XRT110 |
| 英文描述： | XRT110 - PRECISION VOLTAGE-TO-CURRENT CONVERTER |
| 中文描述： | XRT110 -精密的電壓電流轉(zhuǎn)換器 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 148K |
| 代理商： | XRT110 |
6
XTR110
If the supply voltage, +V
CC
, exceeds the gate-to-source
breakdown voltage of Q
EXT
, and the output connection
(drain of Q
EXT
) is broken, Q
EXT
could fail. If the gate-to-
source breakdown voltage is lower than +V
CC
, Q
EXT
can be
protected with a 12V zener diode connected from gate to
source.
Two PNP discrete transistors (Darlington-connected) can be
used for Q
EXT
—see Figure 2. Note that an additional capaci-
tor is required for stability. Integrated Darlington transistors
are not recommended because their internal base-emitter
resistors cause excessive error.
TRANSISTOR DISSIPATION
Maximum power dissipation of Q
EXT
depends on the power
supply voltage and full-scale output current. Assuming that
the load resistance is low, the power dissipated by Q
EXT
is:
P
MAX
= (+V
CC
) I
FS
The transistor type and heat sinking must be chosen accord-
ing to the maximum power dissipation to prevent overheat-
ing. See Table II for general recommendations.
(2)
PACKAGE TYPE
ALLOWABLE POWER DISSIPATION
TO-92
TO-237
TO-39
TO-220
TO-3
Lowest: Use minimum supply and at +25
°
C.
Acceptable: Trade-off supply and temperature.
Good: Adequate for majority of designs.
Excellent: For prolonged maximum stress.
Use if hermetic package is required.
TABLE II. External Transistor Package Type and
Dissipation.
INPUT VOLTAGE RANGE
The internal op amp A
1
can be damaged if its non-inverting
input (an internal node) is pulled more than 0.5V below
common (0V). This could occur if input pins 3, 4 or 5 were
driven with an op amp whose output could swing negative
under abnormal conditions. The voltage at the input of A
1
is:
V
A1
= + +
(3)
This voltage should not be allowed to go more negative than
–0.5V. If necessary, a clamp diode can be connected from
the negative-going input to common to clamp the input
voltage.
COMMON (Ground)
Careful attention should be directed toward proper con-
nection of the common (grounds). All commons should
be joined at one point as close to pin 2 of the XTR110 as
possible. The exception is the I
OUT
return. It can be
returned to any point where it will not modulate the
common at pin 2.
VOLTAGE REFERENCE
The reference voltage is accurately regulated at pin 12
(V
REF
SENSE
). To preserve accuracy, any load including pin
(V
)
16
(V
)
4
(V
IN2
)
2
FIGURE 2. Q
EXT
Using PNP Transistors.
XTR110
47nF
R
L
I
OUT
1
13
14
+V
CC
16
2
2N2907
etc.
TIP30B
etc.
0.047μF
Common
3 should be connected to this point. The circuit in Figure 3
shows adjustment of the voltage reference.
The current drive capability of the XTR110’s internal refer-
ence is 10mA. This can be extended if desired by adding an
external NPN transistor shown in Figure 4.
OFFSET (ZERO) ADJUSTMENT
The offset current can be adjusted by using the potentiom-
eter, R
1
, shown in Figure 5. Set the input voltage to zero and
then adjust R
1
to give 4mA at the output. For spans starting
FIGURE 4. Increasing Reference Current Drive.
XTR110
15
12
+V
CC
16
2
Sense
Force
For 100mA with V
up to
40V use 2N3055 for Q
REF
.
Q
REF
+10V
REF
FIGURE 3. Optional Adjustment of Reference Voltage.
XTR110
V
REF
Adjust
15
12
11
V
REF
Sense
V
REF
Force
+V
CC
16
Common
2
V
REF
R
20k
R
S
(1)
Adjust Range
±5% Optimum
NOTE: (1) R
S
gives higher resolution with reduced
range, set R
S
= 0
for larger range.
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