參數(shù)資料
型號(hào): XRT59L91ID-F
廠商: Exar Corporation
文件頁(yè)數(shù): 28/28頁(yè)
文件大?。?/td> 0K
描述: IC LIU E1 SGL 3.3V 16SOIC
產(chǎn)品變化通告: Packaging Change 14/Jul/2010
標(biāo)準(zhǔn)包裝: 48
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: E1
電源電壓: 3.13 V ~ 3.46 V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 管件
其它名稱: 1016-1576-5
XRT59L91ID-F-ND
XRT59L91
9
Rev. 1.0.0
TClk
TxP O S
TxNE G
tS U
tHO
Figure 2. Illustration on how the XRT59L91 Device Samples the data on the
TXPOS and TXNEG input pins
In general, if the XRT59L91 device samples a “1” on the
TxPOS input pin, then the “Transmit Section” of the
device will ultimately generate a positive polarity pulse
via the TTIP and TRing output pins (across a 1:2
transformer). Conversely, if the XRT59L91 device
samples a “1” on the “TxNEG” input pin, then the
“Transmit Section” of the device will ultimately generate
a negative polarity pulse via the TTIP and TRing output
pins (across a 1:2 transformer).
1.2.1 Operating the Transmitter in the
“Clockless” Mode
The user can configure the XRT59L91 device to oper-
ate in the “Clockless” mode by doing the following:
l
Not applying a clock signal to the TXClk input,
and either pulling this pin to VDD or letting it float.
l
By applying RZ (Return to Zero) data to the
TxPOS and TxNEG input pins, as illustrated
below.
TxPO S
TxN E G
TxC lk
D a ta
1
0
1
0
1
Bit
Pe rio d
RZ P u lse wid th
should conform to
G .703 T e m p la te
N o pulse is to be applie d
in the se cond half of th e
bit perio d
N o A ctivity in
TxC lk L in e
Figure 3. IIlustration on how the Terminal Equipment should apply data to the “Transmit Sec-
tion” of the XRT59L91 Device, when operating in the “Clockless” Mode
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