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參數(shù)資料
| 型號(hào)： | XRT73L06IB-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/63頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 6CH 217BGA |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 6/6 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 217-BBGA |
| 供應(yīng)商設(shè)備封裝： | 217-BGA（23x23） |
| 包裝： | 托盤 |
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XRT73L06
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.2
18
2.2
Adaptive Gain Control (AGC)
The Adaptive Gain Control circuit amplifies the incoming analog signal and compensates for the various flat
losses and also for the loss at one-half symbol rate. The AGC has a dynamic range of 30 dB. The peak
detector provides feedback to the equalizer before slicing occurs.
2.3
Receive Equalizer
The Equalizer restores the integrity of the signal and compensates for the frequency dependent attenuation of
up to 900 feet of coaxial cable (1300 feet for E3). The Equalizer also boosts the high frequency content of the
signal to reduce Inter-Symbol Interference (ISI) so that the slicer slices the signal at 50% of peak voltage to
generate Positive and Negative data. The equalizer can be disabled by programming the appropriate register.
FIGURE 7. ACG/EQUALIZER BLCOK DIAGRAM
2.3.1
Recommendations for Equalizer Settings
The Equalizer has two gain settings to provide optimum equalization. In the case of normally shaped DS3/
STS-1 pulses (pulses that meet the template requirements) that has been driven through 0 to 900 feet of cable,
the Equalizer can be enabled. However, for square-shaped pulses such as E3 or for DS3/STS-1 high pulses
(that does not meet the pulse template requirements), it is recommended that the Equalizer be disabled for
cable length less than 300 feet. This would help to prevent over-equalization of the signal and thus optimize
the performance in terms of better jitter transfer characteristics. The Equalizer also contains an additional 20
dB gain stage to provide the line monitoring capability of the resistively attenuated signals which may have
20dB flat loss. The equalizer gain mode can be enabled by programming the appropriate register.
NOTE: The results of extensive testing indicate that even when the Equalizer was enabled, regardless of the cable length,
the integrity of the E3 signal was restored properly over 0 to 12 dB cable loss at Industrial Temperature.
2.4
Clock and Data Recovery
The Clock and Data Recovery Circuit extracts the embedded clock, RxClk_n from the sliced digital data stream
and provides the retimed data to the B3ZS (HDB3) decoder. The Clock Recovery PLL can be in one of the
following two modes:
2.4.1
Data/Clock Recovery Mode
In the presence of input line signals on the RTIP_n and RRing_n input pins and when the frequency difference
between the recovered clock signal and the reference clock signal is less than 0.5%, the clock that is output on
the RxClk_n out pins is the Recovered Clock signal.
2.4.2
Training Mode
In the absence of input signals at RTIP_n and RRing_n pins, or when the frequency difference between the
recovered line clock signal and the reference clock applied on the ExClk_n input pins exceed 0.5%, a Loss of
Lock condition is declared by toggling RLOL_n output pin “High” or setting the RLOL_n bit to “1” in the control
register. Also, the clock output on the RxClk_n pins are the same as the reference channel clock.
AGC/
Equalizer
Peak Detector
LOS
Detector
Slicer
RTIP_n
RRing_n
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73LC00AIV-F | IC LIU STS1/DS3/E3 SGL 44TQFP |
| XRT73LC03AIV-F | IC LIU E3/DS3/STS-1 3CH 120LQFP |
| XRT73LC04AIV-F | IC LIU E3/DS3/STS-1 4CH 144LQFP |
| XRT73R06IB-F | IC LIU E3/DS3/STS-1 6CH 217BGA |
| XRT73R12IB-L | IC LIU E3/DS3/STS-1 12CH 420TBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L06IQ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| XRT73LC00 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00AES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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