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參數(shù)資料
| 型號： | XRT75L03IV |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 7/92頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| 標準包裝： | 72 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 3/3 |
| 規(guī)程： | DS3，E3，STS-1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 128-LQFP（14x20） |
| 包裝： | 托盤 |
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XRT75L03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
12
71
LOSMUT/
INT
I/O
Muting Upon LOS Enable/Interrupt Output Pin
This input pin is used to configure the Receive Section, in each of the three
channels within the chip, to automatically pull their corresponding Recovered
Data Output pins (e.g. RPOS_n and RNEG_n) to GND anytime and for the
duration that the Receive Section declares the LOS defect condition. In other
words, this feature if enabled will cause the Receive Channel to automatically
mute the Recovered data anytime and for the duration that the Receive Section
declares the LOS defect condition.
"Low" - Disables the Muting upon LOS feature. In this setting the Receive Sec-
tion will NOT automatically mute the Recovered Data whenever it is declaring
the LOS defect condition.
"High" - Enables the Muting upon LOS feature. In this setting the Receive Sec-
tion will automatically mute the Recovered Data whenever it is declaring the
LOS defect condition.
NOTES:
1.
This input pin is will function as the Interrupt Request output pin within
the Microprocessor Serial Interface, if the XRT75L03 has been
configured to operate in the Host Mode.
2.
This configuration setting applies globally to each of the three (3)
channels within the XRT75L03.
99
LOSTHR
I
Analog LOS Detector Threshold Level Select Input:
This input pin permits the user to select both of the following parameters for the
Analog LOS Detector within each of the three Receive Sections within the
XRT75L03 device.
1. The Analog LOS Defect Declaration Threshold (e.g., the maximum signal
level that the Receive Section of a given channel must detect before
declaring the LOS Defect condition), and
2. The Analog LOS Defect Clearance Threshold (e.g., the minimum signal
level that the Receive Section of a given channel must detect before
clearing the LOS Defect condition)
Setting this input pin "High" selects one set of Analog LOS Defect Declaration
and Clearance thresholds. Setting this input pin "Low" selects the other set of
Analog LOS Defect Declaration and Clearance thresholds.
Please see Table 10 for more details.
NOTE: This input pin is only active if at least one channel within the XRT75L03
has been configured to operate in the DS3 or STS-1 Modes.
SYSTEM-SIDE RECEIVE OUTPUT AND RECEIVE CONTROL PINS
PIN #SIGNAL NAME
TYPE
DESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-23P-IU-F4 | CONVERTER MOD DC/DC 13.8V 200W |
| XRT83L314IB | IC LIU T1/E1/J1 14CH 304TBGA |
| XRT75L04IVTR-F | IC LIU E3/DS3/STS-1 4CH 176LQFP |
| VI-23V-IU-F1 | CONVERTER MOD DC/DC 5.8V 200W |
| VE-B1T-MW-F3 | CONVERTER MOD DC/DC 6.5V 100W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT75L03IV-F | 功能描述:外圍驅(qū)動器與原件 - PCI 3-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT75L03IVTR | 功能描述:時鐘合成器/抖動清除器 3CH E3/DS3/STS1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L03IVTR-F | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| XRT75L04 | 制造商:EXAR 制造商全稱:EXAR 功能描述:FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER |
| XRT75L04D | 制造商:EXAR 制造商全稱:EXAR 功能描述:FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
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