參數(shù)資料
型號(hào)： XRT75L04
廠商： Exar Corporation
英文描述： FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
中文描述： 四通道E3/DS3/STS-1線路接口單元，其抖動(dòng)
文件頁(yè)數(shù)： 4/57頁(yè)
文件大?。?/td> 345K
代理商： XRT75L04
XRT75L04
I
FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
TABLE OF CONTENTS
REV. 1.0.4
GENERAL DESCRIPTION.................................................................................................1
F
EATURES
.....................................................................................................................................................1
A
PPLICATIONS
................................................................................................................................................1
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRT 75L04 .............................................................................................................................. 2
T
RANSMIT
I
NTERFACE
C
HARACTERISTICS
........................................................................................................2
R
ECEIVE
I
NTERFACE
C
HARACTERISTICS
..........................................................................................................2
F
IGURE
2. P
IN
O
UT
OF
THE
XRT75L04............................................................................................................................................ 3
ORDERING INFORMATION.....................................................................................................................3
T
ABLE
OF
C
ONTENTS
............................................................................................................
I
PIN DESCRIPTIONS (BY FUNCTION) .............................................................................4
T
RANSMIT
I
NTERFACE
.....................................................................................................................................4
R
ECEIVE
I
NTERFACE
.......................................................................................................................................7
C
LOCK
I
NTERFACE
.........................................................................................................................................9
C
ONTROL
AND
A
LARM
I
NTERFACE
.................................................................................................................10
O
PERATING
M
ODE
S
ELEC
T ..........................................................................................................................12
S
ERIAL
M
ICROPROCESSOR
I
NTERFACE
.........................................................................................................12
J
ITTER
A
TTENUATOR
INTERFACE
...................................................................................................................13
A
NALOG
P
OWER
AND
G
ROUND
.....................................................................................................................14
DIGITAL
P
OWER
AND
G
ROUND
......................................................................................................................16
1.0 ELECTRICAL CHARACTERISTICS ....................................................................................................17
T
ABLE
1: A
BSOLUTE
M
AXIMUM
R
ATINGS
......................................................................................................................................... 17
T
ABLE
2: DC E
LECTRICAL
C
HARACTERISTICS
:................................................................................................................................ 17
2.0 TIMING CHARACTERISTICS ..............................................................................................................18
F
IGURE
3. T
YPICAL
INTERFACE
BETWEEN
TERMINAL
EQUIPMENT
AND
THE
XRT75L04 (
DUAL
-
RAIL
DATA
)........................................... 18
F
IGURE
4. T
RANSMITTER
T
ERMINAL
I
NPUT
T
IMING
.......................................................................................................................... 18
F
IGURE
5. R
ECEIVER
D
ATA
OUTPUT
AND
CODE
VIOLATION
TIMING
................................................................................................... 19
F
IGURE
6. T
RANSMIT
I
NTERFACE
CIRCUIT
FOR
E3, DS3
AND
STS-1 R
ATES
.................................................................................... 19
3.0 LINE SIDE CHARACTERISTICS: ........................................................................................................20
3.1 E3 LINE SIDE PARAMETERS: ...................................................................................................................... 20
F
IGURE
7. P
ULSE
M
ASK
FOR
E3 (34.368
MBITS
/
S
)
INTERFACE
AS
PER
ITU
-
T
G.703......................................................................... 20
T
ABLE
3: E3 T
RANSMITTER
LINE
SIDE
OUTPUT
AND
RECEIVER
LINE
SIDE
INPUT
SPECIFICATIONS
........................................................ 20
F
IGURE
8. B
ELLCORE
GR-253 CORE T
RANSMIT
O
UTPUT
P
ULSE
T
EMPLATE
FOR
SONET STS-1 A
PPLICATIONS
............................. 21
T
ABLE
4: STS-1 P
ULSE
M
ASK
E
QUATIONS
..................................................................................................................................... 21
T
ABLE
5: STS-1 T
RANSMITTER
L
INE
S
IDE
O
UTPUT
AND
R
ECEIVER
L
INE
S
IDE
I
NPUT
S
PECIFICATIONS
(GR-253) .............................. 22
F
IGURE
9. T
RANSMIT
O
UPUT
P
ULSE
T
EMPLATE
FOR
DS3
AS
PER
B
ELLCORE
GR-499..................................................................... 22
T
ABLE
6: DS3 P
ULSE
M
ASK
E
QUATIONS
........................................................................................................................................ 23
T
ABLE
7: DS3 T
RANSMITTER
L
INE
S
IDE
O
UTPUT
AND
R
ECEIVER
L
INE
S
IDE
I
NPUT
S
PECIFICATIONS
(GR-499) ................................. 23
F
IGURE
10. M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
S
TRUCTURE
...................................................................................................... 24
F
IGURE
11. T
IMING
D
IAGRAM
FOR
THE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
................................................................................ 24
T
ABLE
8: M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
T
IMINGS
( TA = 250C, VDD=3.3V± 5%
AND
LOAD
= 10
P
F).................................. 25
4.0 THE TRANSMITTER SECTION: ..........................................................................................................26
F
IGURE
12. S
INGLE
-R
AIL
OR
NRZ D
ATA
F
ORMAT
(E
NCODER
AND
D
ECODER
ARE
E
NABLED
)............................................................ 26
F
IGURE
13. D
UAL
-R
AIL
D
ATA
F
ORMAT
(
ENCODER
AND
DECODER
ARE
DISABLED
)............................................................................. 26
4.1 TRANSMIT CLOCK: ....................................................................................................................................... 26
4.2 B3ZS/HDB3 ENCODER: ................................................................................................................................. 26
4.2.1 B3ZS ENCODING: ...................................................................................................................................................... 26
F
IGURE
14. B3ZS E
NCODING
F
ORMAT
........................................................................................................................................... 27
4.2.2 HDB3 ENCODING:...................................................................................................................................................... 27
F
IGURE
15. HDB3 E
NCODING
F
ORMAT
.......................................................................................................................................... 27
4.3 TRANSMIT PULSE SHAPER: ........................................................................................................................ 27
4.3.1 GUIDELINES FOR USING TRANSMIT BUILD OUT CIRCUIT:................................................................................. 28
4.3.2 INTERFACING TO THE LINE:.................................................................................................................................... 28
4.4 TRANSMIT DRIVE MONITOR: ....................................................................................................................... 28
F
IGURE
16. T
RANSMIT
D
RIVER
M
ONITOR
SET
-
UP
............................................................................................................................ 28
4.5 TRANSMITTER SECTION ON/OFF: .............................................................................................................. 30
5.0 THE RECEIVER SECTION: .................................................................................................................30
5.1 AGC/EQUALIZER: .......................................................................................................................................... 30
5.1.1 INTERFERENCE TOLERANCE: ................................................................................................................................ 31
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT75L04D 制造商:EXAR 制造商全稱:EXAR 功能描述:FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
XRT75L04DES 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 4CH T3/E3/STS1 LIU+DESYNCH 3.3V RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
XRT75L04DIV 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4 CHNL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L04DIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 4-Ch DS3, E3, STS-1 RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT75L04DIVTR 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 4 CHNL E3/DS3/STS 1 JITTER ATTENUATOR RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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