REV. 1.0.7 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT D1 EXLOS Extended LOS: Writing a “1” to this bit extends the number o" />
參數(shù)資料
型號(hào)： XRT83SH38IB
廠商： Exar Corporation
文件頁(yè)數(shù)： 66/78頁(yè)
文件大?。?/td> 0K
描述： IC LIU SH T1/E1/J1 8CH 225BGA
標(biāo)準(zhǔn)包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤
XRT83SH38
66
REV. 1.0.7
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
D1
EXLOS
Extended LOS:
Writing a “1” to this bit extends the number of
zeros at the receive input of each channel before RLOS is
declared to 4096 bits. Writing a “0” reverts to the normal mode
(175+75 bits for T1 and 32 bits for E1).
R/W
0
D0
ICT
In-Circuit-Testing:
Writing a “1” to this bit configures all the
output pins of the chip in high impedance mode for In-Circuit-
Testing. Setting the ICT bit to “1” is equivalent to connecting
the Hardware ICT pin 88 to ground.
R/W
0
TABLE 40: MICROPROCESSOR REGISTER 0X82H BIT DESCRIPTION
GLOBAL REGISTER (0X82H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
TxONCNTL Transmit On Control
0 = Control of receive termination is set;
if in Hardware mode, by RxTSEL Pins
If in Host mode by the RxTsel bit
0 = Control of Transmitter is set ;
if Hardware mode, by TxON pin
if Host mode, by TxON bit
1 = Control of transmitter on, is determined by the individual chan-
nel TxOn bits
R/W
0
D6
TERCNTL Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set tby Hardware-Host bit
or Hardware pin and individual software
1 = Control of the receive termination is set to the hardware pin
R/W
0
D[5:0]
Reserved
These Register Bits are Not Used
TABLE 39: MICROPROCESSOR REGISTER 0X81H, BIT DESCRIPTION
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