REV. 1.0.0 18 1.7 HDB3 Decoder In single rail mode, RPOS is the output of decoded AMI " />
參數(shù)資料
型號(hào)： XRT83SL28IV-F
廠商： Exar Corporation
文件頁數(shù)： 13/47頁
文件大?。?/td> 0K
描述： IC LIU SH E1 8CH 144TQFP
標(biāo)準(zhǔn)包裝： 60
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
包裝： 托盤
XRT83SL28
xr
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
18
1.7
HDB3 Decoder
In single rail mode, RPOS is the output of decoded AMI or HDB3 signals and RNEG is the LCV output. HDB3
data is defined as any block of 4 successive zeros replaced with OOOV or BOOV, so that two successive V
pulses are of opposite polarity to acheive zero DC offsey. If the HDB3 decoder is selected, the receive path
removes the V and B pulses so that the original data is output to RPOS.
1.8
ARAOS (Automatic Receive All Ones)
The XRT83SL28 has the ability to send an All Ones signal to RPOS if ARAOS is enabled in the appropriate
channel register. If ARAOS is enabled and an RLOS condition occurs, the Receiver outputs will generate a
single rail All Ones pattern. When RLOS clears, the All Ones pattern ends and the Receive path returns to
normal operation. For TAOS in the transmit direction, see the Transmit Section of this datasheet. A simplified
block diagram of the ATAOS function is shown in Figure 9.
1.9
RPOS/RNEG/RCLK
The digital output data can be programmed to either single rail or dual rail formats. Figure 10 is a timing
diagram of a repeating "0011" pattern in single-rail mode. Figure 11 is a timing diagram of the same fixed
pattern in dual rail mode.
FIGURE 9. SIMPLIFIED BLOCK DIAGRAM OF THE ARAOS FUNCTION
FIGURE 10. SINGLE RAIL MODE WITH A FIXED REPEATING "0011" PATTERN
RLOS
ARAOS
TAOS
RPOS
RNEG
Rx
RCLK
RPOS
00
0
1
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