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參數(shù)資料
型號(hào): XRT83VSH38IB
廠商: Exar Corporation
文件頁(yè)數(shù): 4/76頁(yè)
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 8CH 225BGA
標(biāo)準(zhǔn)包裝: 84
類(lèi)型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 8/8
規(guī)程: T1,E1,J1
電源電壓: 3.14 V ~ 3.47 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 225-BGA
供應(yīng)商設(shè)備封裝: 225-BGA(19x19)
包裝: 托盤(pán)
XRT83VSH38
9
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.1.0
PARALLEL MICROPROCESSOR INTERFACE
SIGNAL NAME
BGA
LEAD
#
TYPE
DESCRIPTION
HW/HOST
T10
I
Mode Control Input
This pin is used to select Host mode or Hardware mode. By default, the LIU is set in
Hardware mode. To use Host mode, this pin must be pulled "Low".
NOTE: Internally pulled “High” with a 50k
resistor.
WR_R/W/EQC0
D7
I
Write Input(R/W)/Equalizer Control Signal 0
Host Mode
This pin is used to communicate a Read or Write operation according to the which
microprocessor is chosen.
See the Microprocessor Section of this datasheet for
details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See
Table 22 for more details.
NOTE: Internally pulled “Low” with a 50k
resistor.
RD_DS/EQC1
C7
I
Read Input (Data Strobe)/Equalizer Control Signal 1
Host Mode
This pin is used to communicate a Read or Write operation according to the which
microprocessor is chosen.
See the Microprocessor Section of this datasheet for
details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See
Table 22 for more details.
NOTE: Internally pulled “Low” with a 50k
resistor.
ALE/EQC2
A7
I
Address Latch Input (Address Strobe)
Host Mode
This pin is used to latch the address contents into the internal registers within the LIU
device. See the Microprocessor Section of this datasheet for details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See
Table 22 for more details.
NOTE: Internally pulled “Low” with a 50k
resistor.
CS/EQC3
B7
I
Chip Select Input - Host mode:
Host Mode
This pin is used to initiate communication with the microprocessor interface. See the
Microprocessor Section of this datasheet for details.
Hardware Mode
EQC[4:0] are used to set the Receiver Gain, Receiver Impedance and the Transmit
Line Build Out. See
Table 22 for more details.
NOTE: Internally pulled “Low” with a 50k
resistor.
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