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參數(shù)資料
| 型號： | YSS912C |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Hook-Up Wire; Conductor Size AWG:16; No. Strands x Strand Size:26 x 30; Jacket Color:Black; Approval Bodies:UL, CSA; Approval Categories:UL AWM Styles 1007, 1565; CSA Types TR-64, TRSR-64; JQA-F; Passes VW-1 Flame Test RoHS Compliant: Yes |
| 中文描述： | 杜比數(shù)字（AC - 3）/杜比定向邏輯/ DTS解碼器的DSP分 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 141K |
| 代理商： | YSS912C |
YSS912C
9
The following registers of address 0x18 to 0x2F are read-only (write disabled).
The contents of the registers of address 0x18 to 0x2A vary depending on input signal, AC-3 bitstream, DTS bitstream
or PCM, as described below.
1) When input signal is AC-3 bitstream
address
Name
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x18
Bitstream Register 0
fscod
frmsizecod
0x19
Bitstream Register 1
bsid
bsmod
0x1A
Bitstream Register 2
acmod
cmixlev
surmixlev
lfeon
0x1B
Bitstream Register 3
dsurmod
copyrightb
origbs
0
0x1C
Bitstream Register 4
0
dialnorm
0x1D
Bitstream Register 5
0
dialnorm2
0x1E
Bitstream Register 6
audprodie
mixlevel
roomtyp
0x1F
Bitstream Register 7
audprodi2e
mixlevel2
roomtyp2
0x20
Bitstream Register 8
timecod1e
0
timecod1
0x21
Bitstream Register 9
timecod1
0x22
Bitstream Register 10 timecod2e
0
timecod2
0x23
Bitstream Register 11
timecod2
0x24
Bitstream Register 12
langcode
langcod2e
compre
compr2e
0
0x25
Bitstream Register 13
langcod
0x26
Bitstream Register 14
langcod2
0x27
Bitstream Register 15
compr
0x28
Bitstream Register 16
compr2
0x29
Bitstream Register 17
dynrng
0x2A
Bitstream Register 18
dynrng2
2) When input signal is DTS bitstream
address
Name
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x18
Bitstream Register 0
fscod
undefined
RATE
0x19
Bitstream Register 1
undefined
0x1A
Bitstream Register 2
AMODE
undefined
lfeon
0x1B
Bitstream Register 3
undefined
PCMR
The contents of registers of address 0x1C to 0x2A are undefined.
3) When input signal is PCM
The contents of registers of address 0x18 to 0x2A are undefined.
The registers of address 0x2B, 0x2C are not used.
From the registers of address 0x2D to 0x2F, the following data can be read.
address
Name
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x2D
Pc Register
undefined
Pc4 - 0
0x2E
Data Stream Register STREAM7 STREAM6 STREAM5 STREAM4 STREAM3 STREAM2 STREAM1 STREAM0
0x2F
Status Register
DTSDATA AC3DATA 2/0MODE
SURENC KARAOKE
MUTE
CRC
NONPCM
Address 0x06, 0x07 and 0x37 to 0x7F are assigned for TEST. Never access to these registers.
Please refer to Application manual for details of Control register.
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| YSS912C | One chip LSI Consisting of Dolby Digital (AC-3) / Pro Logic decoder amd Sub DSP(含杜比系統(tǒng)（AC-3）/前置邏輯譯碼器和聲音處理DSP的集成電路) |
| YSS915-MZ | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| YSS912F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC |
| YSS915 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Karaoke Processor 2 for Video disc player |
| YSS915-M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC |
| YSS920B | 制造商:YAMAHA 制造商全稱:YAMAHA CORPORATION 功能描述:32位DSP引擎的各種聲音效果 |
| YSS932 | 制造商:YAMAHA 制造商全稱:YAMAHA CORPORATION 功能描述:96kHz DIR + Dolby Digital / Pro Logic II / DTS decoder + Sub DSP |
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