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參數(shù)資料
| 型號： | YSS940-VZ |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP144 |
| 封裝： | LEAD FREE, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 19/36頁 |
| 文件大?。?/td> | 831K |
| 代理商： | YSS940-VZ |
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YSS944/943/940
26
(5) AC Characteristics
(a)
Power up, Hardware Reset, and clock
No.
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
1
nIC time 1
TIC1
Figure 1) below
5
ms
2
nIC time 2
TIC2
Figure 2) below
1
s
3
XI clock frequency
fXIN
12.288
MHz
4
XI clock duty
XDUTY
40
60
%
5
Internal operating
clock cycle
TCLK
Note 1)
1000/178.176
ns
Note 2)
0
1
s
6
Power ON time
TV1V2
Note 3)
1
s
Note 1)
When using recommended XI input and recommended PLL setting. The internal operating clock
frequency is 178.176 MHz.
Note 2)
When Shortcut key barrier diode is not connected
Raise the voltage level 3.3 V power supply(VDD1,AVDDR,AHVDD,AHVDDG)
more than 1.2 V power supply (VDD2,DVDD) even if it is turned ON or OFF.
Note 3)
When Shortcut key barrier diode is connected
Insert a Shortcut key barrier diode with forward voltage of 0.4 V or less between the 3.3 V power
supply (VDD1, AVDDR, AHVDD, and AHVDDG) and 1.2 V power supply (VDD2 and DVDD)
(cathode is VDD1 and anode is VDD2).
Any order and any relation of voltage level is acceptable between 3.3V power supply and 1.2V
power supply when it is turned ON or OFF.
Note 4)
The time interval of power ON or OFF between 3.3V power supply and 1.2V power supply must
be within one second. Only one power keep on supplying, LSI would be damaged.
1) At power-on
VDD1, AVDDR,
AHVDD, AHVDDG
XI
nIC
1
VDD2,
DVDD
6
If a crystal oscillator is connected, this includes the time between power supply stabilization and
oscillator stabilization.
Turn on the power when nIC is at low level.
2) In normal operation mode
nIC
2
The XI input and power supply must be stabilized.
If XI oscillation has stopped during initialization in power-down mode, time is required to stabilize
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