參數(shù)資料
型號(hào): Z86319
廠(chǎng)商: ZiLOG, Inc.
英文描述: PS/2 MOUSE CONTROLLER
中文描述: PS / 2鼠標(biāo)控制器
文件頁(yè)數(shù): 15/23頁(yè)
文件大?。?/td> 278K
代理商: Z86319
Z86319
Zilog
PS/2 Mouse Controller
DS97KEY1605
P R E L I M I N A R Y
15
1
Stack Pointer.
The Z86319 features an 8-bit Stack
Pointer (R255) used for the internal stack that resides with-
in the general-purpose registers.
Counter/Timer.
There are two 8-bit programmable
counter/timers (T0 and T1), each driven by its own 6-bit
programmable prescaler. The T1 prescaler can be driven
by internal or external clock sources, however, the T0 can
be driven by the internal clock source only (Figure 16).
The 6-bit prescalers can divide the input frequency of the
clock source by any integer number from 1 to 64. Each
prescaler drives its counter, which decrements the value
(1 to 256) that has been loaded into the counter. When
both counter and prescaler reach the end of count, a timer
interrupt request IRQ4 (T0) or IRQ5 (T1) is generated.
The counter can be programmed to start, stop, continue,
or restart from the initial value. The counters can also be
programmed to stop upon reaching zero (single pass
mode) or to automatically reload the initial value and contin-
ue counting (modulo-n continuous mode).
The counters, but not the prescalers, are read at any time
without disturbing their value or count mode. The clock
source for T1 is user-definable and can be either the inter-
nal microprocessor clock divided by four, or an external
signal input via Port 3. The Timer Mode register configures
the external timer input (P31) as an external clock, a trigger
input that is retriggerable or not retriggerable, or as a gate
input for the internal clock.
Figure 16. Counter/Timers Block Diagram
PRE0
Initial Value
Register
T0
Initial Value
Register
T0
Current Value
Register
6-Bit
Down
Counter
8-Bit
Down
Counter
÷
4
OSC
6-Bit
Down
Counter
8-Bit
Down
Counter
PRE1
Initial Value
Register
T1
Initial Value
Register
T1
Current Value
Register
Clock
Logic
IRQ4
IRQ5
Internal Data Bus
Write
Write
Read
Internal Clock
Gated Clock
Triggered Clock
Write
Write
Read
Internal Data Bus
External Clock
Internal
Clock
÷
4
T P31
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