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參數(shù)資料
| 型號： | Z86C04 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS 8-BIT LOW-COST 1K/2K-ROM MICROCONTROLLERS |
| 中文描述： | 的CMOS 8位的低費用1K/2K-ROM微控制器 |
| 文件頁數(shù)： | 23/34頁 |
| 文件大?。?/td> | 207K |
| 代理商： | Z86C04 |
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Z86C04/C08
Zilog
CMOS 8-Bit Low-Cost 1K/2K-ROM Microcontrollers
DS97DZ80502
P R E L I M I N A R Y
23
1
Stack Pointer.
The Z8 has an 8-bit Stack Pointer (R255)
used for the internal stack that resides within the 124 gen-
eral-purpose registers.
General-Purpose Register (GPR).
The general-purpose
register upon device power-up is undefined. The general-
purpose register upon a STOP-Mode Recovery and reset
stays in its last state. It may not keep its last state from a
V
reset if the V
drops below 2.6V.
Note:
Register R254
has been designated as a general-purpose register and is
set to 00H after any reset.
Counter/Timer.
There are two 8-bit programmable
counter/timers (T0 and T1), each driven by its own 6-bit
programmable prescaler. The T1 prescaler can be driven
by internal or external clock sources, however the T0 can
be driven by the internal clock source only (Figure 14).
The 6-bit prescalers can divide the input frequency of the
clock source by any integer number from 1 to 64. Each
prescaler drives its counter, which decrements the value
(1 to 256) that has been loaded into the counter. When
both counter and prescaler reach the end of count, a timer
interrupt request, IRQ4 (T0) or IRQ5 (T1), is generated.
The counter can be programmed to start, stop, restart to
continue, or restart from the initial value. The counters can
also be programmed to stop upon reaching zero (single
pass mode) or to automatically reload the initial value and
continue counting (modulo-n continuous mode).
The counters, but not the prescalers are read at any time
without disturbing their value or count mode. The clock
source for T1 is user-definable and can be either the inter-
nal microprocessor clock divided by four, or an external
signal input through Port 3. The Timer Mode register con-
figures the external timer input (P31) as an external clock,
a trigger input that is retriggerable or non-retriggerable, or
as a gate input for the internal clock.
Figure 12. Register Pointer
The upper nibble of the register file address
provided by the register pointer specifies
the active working-register group.
r7
r6
r5
r4
R253
(Register Pointer)
I/O Ports
Specified Working
Register Group
The lower nibble
of the register
file address
provided by the
instruction points
to the specified
register.
r3
r2
r1
r0
Register Group 1
Register Group 0
R15 to R0
Register Group F
R15 to R4*
R3 to R0
R15 to R0
FF
F0
0F
00
1F
10
2F
20
3F
30
4F
40
5F
50
6F
60
7F
70
*Expanded Register Group (0) is selected in this figure
by handling bits D3 to D0 as "0" in Register R253(RP).
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