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參數(shù)資料
| 型號(hào)： | Z86C64 |
| 廠商： | ZiLOG, Inc. |
| 英文描述： | CMOS Z8 32K ROM MICROCONTROLLER |
| 中文描述： | 32K的光盤(pán)的CMOS Z8單片機(jī) |
| 文件頁(yè)數(shù)： | 13/17頁(yè) |
| 文件大?。?/td> | 143K |
| 代理商： | Z86C64 |
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Z86C63/64
CPS DC-5461-02
P R E L I M I N A R Y
AC CHARACTERISTICS
External I/O or Memory Read and Write Timing
Z86C63/64 (20 MHz—Standard Mode Only[4])
T
= 0
°
C
to +70
°
C
20 MHz
Min
T
= –40
°
C
to +105
°
C
20 MHz
Min
No
Symbol
Parameter
Max
Max
Units
Notes
1
2
3
4
5
TdA(AS)
TdAS(A)
TdAS(DR)
TwAS
TdAZ(DS)
Address Valid to /AS rise Delay
/AS rise to Address Float Delay
/AS rise to Read Data Req’d Valid
/AS Low Width
Address Float to /DS fall
15
25
25
35
ns
ns
ns
ns
ns
[2,3]
[2,3]
[1,2,3]
[2,3]
120
120
30
0
30
0
6
7
8
9
10
TwDSR
TwDSW
TdDSR(DR)
ThDR(DS)
TdDS(A)
/DS (Read) Low Width
/DS (Write) Low Width
/DS fall to Read Data Req’d Valid
Read Data to /DS rise Hold Time
/DS rise to Address Active Delay
105
105
ns
ns
ns
ns
ns
[1,2,3]
[1,2,3]
[1,2,3]
[2,3]
[2,3]
65
55
0
40
65
55
0
40
11
12
13
14
15
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW)
TdDS(DW)
/DS rise to /AS fall Delay
R//W Valid to /AS rise Delay
/DS rise to R//W Not Valid
Write Data Valid to /DS fall (Write) Delay
/DS rise to Write Data Not Valid Delay
25
20
25
20
25
25
20
25
20
25
ns
ns
ns
ns
ns
[2,3]
[2,3]
[2,3]
[2,3]
[2,3]
16
17
18
TdA(DR)
TdAS(DS)
TdDM(AS)
Address Valid to Read Data Req’d Valid
/AS rise to /DS fall Delay
/DM Valid to /AS rise Delay
150
150
ns
ns
ns
[1,2,3]
[2,3]
[2,3]
35
15
35
15
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] See clock cycle dependent characteristics table.
[4] Low EMI is not selected.
Standard Test Load
All timing references use 2.0 V for a logic 1 and 0.8 V for a logic 0.
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