- 您現(xiàn)在的位置：買賣IC網 > PDF目錄373767 > Z86C8416PSC (ZILOG INC) Z8 MCU MICROCONTROLLERS PDF資料下載
參數(shù)資料
| 型號： | Z86C8416PSC |
| 廠商： | ZILOG INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Z8 MCU MICROCONTROLLERS |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 37/46頁 |
| 文件大?。?/td> | 957K |
| 代理商： | Z86C8416PSC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁當前第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
Z86C83/C84
Z8
MCU Microcontrollers
37
DS96DZ80203
FUNCTIONAL DESCRIPTION
(Continued)
Watch-Dog Timer Mode Register (WDTMR).
The WDT
reaches its terminal count. The WDT is initially enabled by
executing the WDT instruction and refreshed on
subsequent executions of the WDT instruction. The WDT
circuit is driven by an on-board RC oscillator or external
oscillator from the XTAL1 pin. The POR clock source is
selected with bit 4 of the WDT register (Figure 38).
WDT instruction affects the Z (Zero), S (Sign), and V
(Overflow) flags. The WDTMR must be written to within 64
internal system clocks. After that, the WDTMR is write
protected.
Note:
WDT time-out while in Stop-Mode will not reset
SMR, PCON, WDTMR, P2M, P3M, Ports 2 and 3 Data
Registers, but will cause the reset delay to occur.
The Power-On Reset (POR) clock source is selected with
bit 4 of the WDTMR. Bits 0 and 1 control a tap circuit that
determines the time-out period. Bit 2 determines whether
the WDT is active during HALT and bit 3 determines WDT
activity during STOP. If bits 3 and 4 of this register are both
set to "1," the WDT is only driven by the external clock
during STOP mode. This feature makes it possible to wake
up from STOP mode from an internal source. Bits 5
through 7 of the WDTMR are reserved (Figure 39). This
register is accessible only during the first 64 processor
cycles (64 SCLKs) from the execution of the first
instruction after Power-On-Reset, Watch-Dog Reset or a
Stop-Mode Recovery. After this point, the register cannot
be modified by any means, intentional or otherwise. The
WDTMR cannot be read and is located in Bank F of the
Expanded Register group at address location 0FH.
Figure 38. Resets and WDT
CLK
18 Clock RESET
Generator
RESET
Clear
WDT TAP SELECT
RC
OSC.
CK
CLR
128 SCLK
POR
128
SCLK
WDT/POR Counter Chain
256
SCLK
512
SCLK
2048
SCLK
3.0V Operating
Voltage Det.
Internal
RESET
WDT Select
(WDTMR)
CK Source
Select
(WDTMR)
XTAL
VCC
3.0V REF
From Stop
Mode
Recovery
Source
WDT
Stop Delay
Select (SMR D5)
12 ns Glitch Filter
+
-
M
U
X
/RESET
相關PDF資料 |
PDF描述 |
|---|---|
| Z86C8416SEC | Z8 MCU MICROCONTROLLERS |
| Z86C8416SSC | Z8 MCU MICROCONTROLLERS |
| Z86C8416VEC | Z8 MCU MICROCONTROLLERS |
| Z86C8416VSC | Z8 MCU MICROCONTROLLERS |
| Z86C84 | Z8 MCU MICROCONTROLLERS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| Z86C8416SEC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Z8 MCU MICROCONTROLLERS |
| Z86C8416SSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Z8 MCU MICROCONTROLLERS |
| Z86C8416VEC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Z8 MCU MICROCONTROLLERS |
| Z86C8416VSC | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:Z8 MCU MICROCONTROLLERS |
| Z86C89 | 制造商:ZILOG 制造商全稱:ZILOG 功能描述:ROMLESS CMOS Z8 8-BIT MICROCONTROLLER |
發(fā)布緊急采購，3分鐘左右您將得到回復。