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Z86E30/E31/E40
Zilog
Z8 4K OTP Microcontroller
DS97Z8X0500
P R E L I M I N A R Y
21
1
Additional Timing Table (Divide-By-One Mode)
T
A
= 0
°
C to +70
°
C
T
A
= -40
°
C to +105
°
C
4 MHz
4 MHz
No
1
Symbol
TpC
Parameter
Input Clock Period
V
CC
Note [6]
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
Min
250
250
Max
DC
DC
25
25
Min
250
250
Max
DC
DC
25
25
Units
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,7,8
1,2,7,8
1,2,7,8
1,3,7,8
1,3,7,8
1,2,7,8
1,2,7,8
4,8
4,8
2
TrC,TfC
Clock Input Rise &
Fall Times
Input Clock Width
3
TwC
100
100
100
70
5TpC
5TpC
8TpC
8TpC
100
100
100
70
5TpC
5TpC
8TpC
8TpC
4
TwTinL
Timer Input Low
Width
Timer Input High
Width
Timer Input Period
5
TwTinH
6
TpTin
7
TrTin, TfTin Timer Input Rise
& Fall Timer
TwIL
Int. Request Low
Time
TwIL
Int. Request Low
Time
TwIH
Int. Request Input
High Time
Twsm
STOP Mode
Recovery Width
Spec
Tost
Oscillator Startup
Time
100
100
100
100
ns
ns
ns
ns
8A
100
70
5TpC
5TpC
5TpC
5TpC
12
12
100
70
5TpC
5TpC
5TpC
5TpC
12
12
8B
9
10
ns
ns
11
3.5V
5.5V
5TpC
5TpC
5TpC
4,8,9
Notes:
1. Timing Reference uses 0.7 V
CC
for a logic 1 and 0.2 V
CC
for a logic 0.
2. Interrupt request via Port 3 (P31-P33).
3. Interrupt request via Port 3 (P30).
4. SMR-D5 = 1, POR STOP Mode Delay is on.
5. Reg. WDTMR.
6. The V
CC
voltage specification of 5.5V guarantees 5.0V
±
+/- 0.5V and
the V
CC
voltage specification of 3.5V guarantees 3.5V only.
7. SMR D1 = 0.
8. Maximum frequency for internal system clock is 4 MHz when
using XTAL divide-by-one mode.
9. For RC and LC oscillator, and for oscillator driven by clock driver.