參數(shù)資料
型號: Z86E4016VSC
廠商: ZILOG INC
元件分類: 微控制器/微處理器
英文描述: Z8 4K OTP Microcontroller
中文描述: 8-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 39/66頁
文件大小: 453K
代理商: Z86E4016VSC
Z86E30/E31/E40
Zilog
Z8 4K OTP Microcontroller
DS97Z8X0500
P R E L I M I N A R Y
39
1
The counters can be programmed to start, stop, restart to
continue, or restart from the initial value. The counters can
also be programmed to stop upon reaching zero (single
pass mode) or to automatically reload the initial value and
continue counting (modulo-n continuous mode).
The counters, but not the prescalers, can be read at any
time without disturbing their value or count mode. The
clock source for T1 is user-definable and can be either the
internal microprocessor clock divided by four, or an exter-
nal signal input through Port 3. The Timer Mode register
configures the external timer input (P31) as an external
clock, a trigger input that can be retriggerable or non-retrig-
gerable, or as a gate input for the internal clock. Port 3 line
P36 serves as a timer output (T
OUT
) through which T0, T1
or the internal clock can be output. The counter/timers can
be cascaded by connecting the T0 output to the input of
T1.
Figure 27. Counter/Timer Block Diagram
PRE0
Initial Value
Register
T0
Initial Value
Register
T0
Current Value
Register
6-Bit
Down
Counter
8-bit
Down
Counter
÷
16
÷
4
6-Bit
Down
Counter
8-Bit
Down
Counter
PRE1
Initial Value
Register
T1
Initial Value
Register
T1
Current Value
Register
÷
2
Clock
Logic
IRQ4
TOUT
P36
IRQ5
Internal Data Bus
Write
Write
Read
Internal Clock
Gated Clock
Triggered Clock
TIN P31
Write
Write
Read
Internal Data Bus
External Clock
Internal
Clock
D0 (SMR)
÷
4
÷
2
OSC
D1 (SMR)
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