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參數(shù)資料
| 型號： | Z8S18020VEC |
| 廠商： | ZILOG INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | CONN POWER HEADER 4ROW 8POS P-F |
| 中文描述： | 8-BIT, MICROPROCESSOR, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 18/70頁 |
| 文件大?。?/td> | 387K |
| 代理商： | Z8S18020VEC |
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Z80180/Z8S180/Z8L180
Enhanced Z180 Microprocessor
Zilog
1-18
P R E L I M I N A R Y
DS971800401
If an interrupt source is individually disabled, it cannot
bring the Z80180/Z8S180/Z8L180 out of SLEEP mode. If
an interrupt source is individually enabled, and the IEF bit
is 1 so that interrupts are globally enabled (by an EI in-
struction), the highest priority active interrupt will occur,
with the return address being the instruction after the SLP
instruction. If an interrupt source is individually enabled,
but the IEF bit is 0 so that interrupts are globally disabled
(by a DI instruction), the Z80180/Z8S180/Z8L180 leaves
SLEEP mode by simply executing the following instruc-
tion(s).
This provides a technique for synchronization with high-
speed external events without incurring the latency im-
posed by an interrupt response sequence. Figure 14
shows the timing for exiting SLEEP mode due to an inter-
rupt request. Note that the Z80180/Z8S180/Z8L180 takes
about 1.5 clocks to restart.
IOSTOP Mode.
IOSTOP mode is entered by setting the
IOSTOP bit of the I/O Control Register (ICR) to 1. In this
case, on-chip I/O (ASCI, CSI/O, PRT) stops operating.
However, the CPU continues to operate. Recovery from
IOSTOP mode is by resetting the IOSTOP bit in ICR to 0.
SYSTEM STOP Mode
. SYSTEM STOP mode is the com-
bination of SLEEP and IOSTOP modes. SYSTEM STOP
mode is entered by setting the IOSTOP bit in ICR to 1 fol-
lowed by execution of the SLP instruction. In this mode,
on-chip I/O and CPU stop operating, reducing power con-
sumption, but the PHI output continues to operate. Recov-
ery from SYSTEM STOP mode is the same as recovery
from SLEEP mode except that internal I/O sources (dis-
abled by IOSTOP) cannot generate a recovery interrupt.
IDLE
Z80180/Z8S180/Z8L180 into this mode by setting the
IOSTOP bit (ICR5) to 1, CCR6 to 0, CCR3 to 1 and exe-
cuting the SLP instruction. The oscillator keeps operating
but its output is blocked to all circuitry including the PHI
pin. DRAM refresh and all internal devices stop, but exter-
nal interrupts can occur. Bus granting to external masters
can occur if the BREST bit in the CPU control Register
(CCR5) was set to 1 before IDLE mode was entered.
Mode.
Software
can
put
the
The Z80180/Z8S180/Z8L180 leaves IDLE mode in re-
sponse to a Low on RESET, an external interrupt request
on NMI, or an external interrupt request on /INT0, /INT1 or
/INT2 that is enabled in the INT/TRAP Control Register. As
previously described for SLEEP mode, when the
Z80180/Z8S180/Z8L180 leaves IDLE mode due to an
NMI, or due to an enabled external interrupt request when
the IEF flag is 1 due to an EI instruction, it starts by per-
forming the interrupt with the return address being that of
the instruction after the SLP instruction.
If an external interrupt enables the INT/TRAP control reg-
ister while the IEF1 bit is 0, Z80180/Z8S180/Z8L180
leaves IDLE mode; specifically, the processor restarts by
executing the instructions following the SLP instruction.
Figure 14. SLEEP Timing
SLP 2nd Opcode
Fetch Cycle
SLEEP Mode
φ
T
2
T
3
T
1
T
2
T
S
T
S
T
1
/INTi, /NMI
A
0
-A
19
/HALT
M1
Opcode Fetch or Interrupt
Acknowledge Cycle
SLP 2nd Opcode Address
FFFFFH
T
2
T
3
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| Z8S18020VEC00TR | 功能描述:IC Z180 MPU 68PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Z180 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
| Z8S18020VEC1960 | 功能描述:微處理器 - MPU 20MHz STATIC Z180 XT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| Z8S18020VEC1960TR | 功能描述:IC Z180 MPU 68PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:Z180 標(biāo)準(zhǔn)包裝:40 系列:MPC83xx 處理器類型:32-位 MPC83xx PowerQUICC II Pro 特點:- 速度:267MHz 電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 封裝/外殼:516-BBGA 裸露焊盤 供應(yīng)商設(shè)備封裝:516-PBGAPGE（27x27） 包裝:托盤 |
| Z8S18020VEG | 功能描述:微處理器 - MPU 20MHz STATIC Z180 XT RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| Z8S18020VEG00TR | 制造商:Zilog Inc 功能描述:Z8S180 Series 20 MHz 5 V Surface Mount Enhanced Z180 Microprocessor - PLCC-68 |
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