參數(shù)資料
型號(hào): Z90104
廠商: ZiLOG, Inc.
英文描述: CAP 820PF 100V 10% X7R AXIAL BULK R-MIL-PRF-39014
中文描述: 40引腳低成本數(shù)字電視控制器
文件頁數(shù): 18/36頁
文件大?。?/td> 232K
代理商: Z90104
Z90102/90103/90104
40-Pin Low-Cost Digital Television Controller
Zilog
18
DS97TEL1902
FUNCTIONAL DESCRIPTION
(Continued)
Memory Mapped Register.
All control registers and I/O
ports (except Port 2 and Port 3) are assigned to program
memory space. Address space FC00H contains OSD con-
trol registers, PWM output registers and Port 6 I/O regis-
ters. Two bits of the decoded AFCIN port are assigned to
Port 6 input port. LDE and LDEI instructions are required
to transfer data between the Register File and the Memory
Mapped Registers.
Register File.
A total of 253 byte registers are implement-
ed in the Z8 core. Address 00H, 01H and FOH are re-
served. The register file consists of two I/O Port registers,
236 general-purpose registers and 15 control and status
registers (Figure 19). The instructions can access regis-
ters directly or indirectly with an 8-bit address field. This
also allows short 4-bit register addressing using the Reg-
ister Pointer. In the 4-bit mode, the register file is divided
into sixteen working-register groups, each occupying 16
continuous locations. The Register Pointer addresses the
starting location of the active working-register group (Fig-
ure 15).
Note:
Register Bank E0-EF is only accessed through a
working register and indirect addressing modes.
Figure 15. Register File Configuration
Hex
Address
Port 2 (P2)
Port 3 (P3)
General-Purpose
Registers
Reserved
Timer Mode (TMR)
Timer/Counter1(T1)
T1 Prescaler (PRE1)
Timer/Counter0 (T0)
T0 Prescaler (PRE0)
Port 2 Mode (P2M)
Port 3 Mode (P3M)
Port 0-1 Mode (P01M)
Interrupt Priority Reg (IPR)
Interrupt Request Reg (IRQ)
Interrupt Mask Reg (IMR)
Condition Flag (FLAGS)
Register Pointer (RP)
Stack Pointer High (SPH)
Stack Pointer Low (SPL)
02
03
04
EF
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
FA
FB
FC
FD
FE
FF
Figure 16. Register Pointer
The upper nibble of the register file address
provided by the register pointer specifies
the active working-register group.
r7
r6
r5
r4
R253
(Register Pointer)
I/O Ports
Specified Working
Register Group
The lower nibble
of the register
file address
provided by the
instruction points
to the specified
register.
r3
r2
r1
r0
Register Group 1
Register Group 0
R15 to R0
Register Group F
R15 to R4
R3 to R0
R15 to R0
FF
F0
0F
00
1F
10
2F
20
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