參數(shù)資料
型號: ZL10036LDF1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 消費(fèi)家電
英文描述: Digital Satellite Tuner with RF Bypass
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC40
封裝: 6 X 6 MM, LEAD FREE, QFN-40
文件頁數(shù): 1/38頁
文件大小: 939K
代理商: ZL10036LDF1
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.
Features
QPSK tuner for quadrature down conversion from
L-band to Zero IF
Compatible with DSS and DVB formats (QPSK)
Symbol rate range 1 to 45 MSps
Power & forget
, fully integrated, alignment free,
local oscillator
Integrated baseband filters with bandwidth adjust
from 4 to 40 MHz
Good immunity to strong adjacent undesired
channels
Selectable RF bypass
I2C bus interface with 3V3 compatible logic levels
Integrated RF loop through for cascaded tuner
applications
Power saving mode/hardware power down
Optimized front end solution when partnered with
Zarlink ZL10312 demodulator
Applications
Satellite receiver systems
Description
The ZL10036 is a single chip wideband direct
conversion tuner, with integral RF bypass, optimized
for application in digital satellite receiver systems.
The device offers a highly integrated solution to a
satellite tuner function, incorporating an I2C bus
interface controller, a low phase noise PLL frequency
synthesizer, a quadrature phase split tuner, a fully
integrated local oscillator which requires no production
set up, and adjustable baseband channel filters.
The I2C bus interface controls all of the tuner
functionality including the PLL frequency synthesizer,
the bypass disable and the baseband gain and
bandwidth adjust.
July 2004
Ordering Information
ZL10036LDG
ZL10036LDF
ZL10036LDG1 40-pin QFN*
ZL10036LDF1
40-pin QFN
40-pin QFN
(trays)
(tape and reel)
(trays)
(tape and reel)
40-pin QFN*
*Pb free
-10
°
C to +85
°
C
ZL10036
Digital Satellite Tuner with RF Bypass
Data Sheet
Figure 1 - Basic Block Diagram
相關(guān)PDF資料
PDF描述
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