參數(shù)資料
型號(hào): ZL38002DGA1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 數(shù)字傳輸電路
英文描述: Low-Voltage Acoustic Echo Canceller With Noise Reduction
中文描述: DATACOM, ISDN ECHO CANCELLER, PDSO36
封裝: 0.300 INCH, LEAD FREE, QSOP-36
文件頁數(shù): 3/47頁
文件大?。?/td> 440K
代理商: ZL38002DGA1
ZL38002
Data Sheet
3
Zarlink Semiconductor Inc.
Pin Description
QSOP
Pin #
TQFP
Pin #
Name
Description
1
43
ENA1
SSI Enable Strobe/ST-BUS & GCI Mode for Rin/Sout (Input).
This pin
has dual functions depending on whether SSI or ST-BUS/GCI is selected.
For SSI, this strobe must be present for frame synchronization. This is an
active high channel enable strobe, 8 or 16 data bits wide, enabling serial
PCM data transfer for on Rin/Sout pins. Strobe period is 125 ms. For ST-
BUS or GCI, this pin, in conjunction with the MD1 pin, selects the proper
mode for Rin/Sout pins (see ST-BUS and GCI Operation description).
2
45
MD1
ST-BUS & GCI Mode for Rin/Sout (Input).
When in ST-BUS or GCI
operation, this pin, in conjunction with the ENA1 pin, will select the proper
mode for Rin/Sout pins (see ST-BUS and GCI Operation description).
Connect this pin to Vss in SSI mode.
3
46
ENA2
SSI Enable Strobe /ST-BUS & GCI Mode for Sin/Rout (Input).
This pin
has dual functions depending on whether SSI or ST-BUS/GCI is selected.
For SSI, this is an active high channel enable strobe, 8 or 16 data bits wide,
enabling serial PCM data transfer on Sin/Rout pins. Strobe period is
125 ms. For ST-BUS/GCI, this pin, in conjunction with the MD2 pin, selects
the proper mode for Sin/Rout pins (see ST-BUS and GCI Operation
description).
4
47
MD2
ST-BUS & GCI Mode for Sin/Rout (Input).
When in ST-BUS or GCI
operation, this pin in conjunction with the ENA2 pin, selects the proper
mode for Sin/Rout pins (see ST-BUS and GCI Operation description).
Connect this pin to Vss in SSI mode.
5
48
Rin
Receive PCM Signal Input (Input).
128 kbps to 4096 kbps serial PCM
input stream. Data may be in either companded or 2’s complement linear
format. This is the Receive Input channel from the line (or network) side.
Data bits are clocked in following SSI, GCI or ST-BUS timing requirements.
6
2
Sin
Send PCM Signal Input (Input).
128 kbps to 4096 kbps serial PCM input
stream. Data may be in either companded or 2’s complement linear format.
This is the Send Input channel (from the microphone). Data bits are
clocked in following SSI, GCI or ST-BUS timing requirements.
7
3
IC
Internal Connection (Input).
Must be tied to Vss.
8
5
MCLK
Master Clock (Input).
Nominal 20 MHz Master Clock input (can be
asynchronous relative to 8 KHz frame signal.) Tie together with MCLK2.
9,10,11
6, 7, 8
IC
Internal Connection (Input).
Must be tied to Vss.
12
9
LAW
A/
μ
Law Select (Input).
When low, selects
μ
Law companded PCM.
When high, selects A-Law companded PCM. This control is for both serial
pcm ports.
13
11
FORMAT
ITU-T/Sign Mag (Input).
When low, selects sign-magnitude PCM code.
When high, selects ITU-T (G.711) PCM code. This control is for both serial
pcm ports.
14
13
RESET
Reset / Power-down (Input).
An active low resets the device and puts the
ZL38002 into a low-power stand-by mode.
17
16
SCLK
Serial Port Synchronous Clock (Input).
Data clock for the serial
microport interface.
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