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ZL49010/1, ZL49020/1, ZL49030/1
Data Sheet
8
Zarlink Semiconductor Inc.
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing
* Test Conditions
1. dBm refers to a reference power of 1 mW delivered into a 600 ohms load.
2. Data sequence consists of all DTMF digits.
3. Tone on = 40 ms, tone off = 40 ms.
4. Signal condition consists of nominal DTMF frequencies.
5. Both tones in composite signal have an equal amplitude.
6. Tone pair is deviated by
1.5%
2 Hz.
7. Bandwidth limited (0-3 kHz) Gaussian noise.
8. Precise dial tone frequencies are 350 Hz and 440 Hz (
±
2%).
9. Referenced to lowest level frequency component in DTMF signal.
10. Referenced to the minimum valid accept level.
11. Both tones must be within valid input signal range.
12. Internal guard time for ZL490x1 = 20ms.
13. Timing parameters are measured with 70pF load at SD output.
14. Time duration between PWDN pin changes from ‘1‘ to ‘0‘ and ESt/DStD becomes active.
15. Guaranteed by design and characterization. Not subject to production testing.
16. Value measured with an applied tone of 450 Hz.
AC Electrical Characteristics
- voltages are with respect to V
DD
=5V
±
5%, V
SS
=0V and temperature -40 to +85
°
C unless
otherwise stated.
Characteristics
Sym
Min
Typ
Max
Units
Test Conditions*
1
Valid input signal level
(each tone of composite signal)
Positive twist accept
Negative twist accept
Frequency deviation accept
Frequency deviation reject
Third tone tolerance
Noise tolerance
Dial tone tolerance
Supervisory tones detect level
(Total power)
Supervisory tones reject level
Energy detector attack time
Energy detector decay time
Powerdown time
Powerup time
-50
2.45
0
775
8
8
dBm
mV
RMS
dB
dB
1,2,3,5,6,12
2
3
4
5
6
7
8
9
1,2,3,4,11,12,15
1,2,3,4,11,12,15
1,2,3,5,12
1,2,3,5,12,15
1,2,3,4,5,12
7,9,12
8,10,12
16
±
1.5
%
±
2Hz
±
3.5
%
-16
-12
+15
dB
dB
dB
dBm
-35
10
11
12
13a
13b
-50
6.5
25
10
30
50
dBm
ms
ms
ms
ms
ms
16
16
16
IDDQ
≤
100
μ
A
ZL49010/ZL49030
ZL49011/ZL49031
Note 14
ZL490x0
t
SA
t
SD
1.0
3
14
Tone present detect time (ESt
logic output)
Tone absent detect time (ESt
logic output)
Tone duration accept
(DStD logic output)
Tone duration reject
(DStD logic output)
Interdigit pause accept (DStD
logic output)
Interdigit pause reject (DStD logic
output)
Data shift rate 40-60% duty cycle
Propagation delay
(ACK to Data Bit)
Data hold time (ACK to SD)
t
DP
3
13
20
ms
15
t
DA
3
15
ms
ZL490x0
16
t
REC
40
ms
ZL490x1
17
t
REC
20
ms
ZL490x1
18
t
ID
40
ms
ZL490x1
19
t
DO
20
ms
ZL490x1
20
21
f
ACK
t
PAD
1.0
100
3.0
140
MHz
ns
13,15
1MHz f
ACK
,
13,15
13,15
22
t
DH
30
50
ns