參數(shù)資料
型號(hào)： ZL50022
廠商： Zarlink Semiconductor Inc.
英文描述： Enhanced 4 K Digital Switch with Stratum 4E DPLL
中文描述： 增強(qiáng)為4 K數(shù)字交換與地層4E條數(shù)字鎖相環(huán)
文件頁數(shù)： 16/121頁
文件大小： 939K
代理商： ZL50022
ZL50022
Data Sheet
16
Zarlink Semiconductor Inc.
G15, G14,
E15, F14
102, 106,
110, 112
FPo0 - 3
ST-BUS/GCI-Bus Frame Pulse Outputs 0 to 3 (5 V-Tolerant
Three-state Outputs)
FPo0: 8 kHz frame pulse corresponding to the 4.096 MHz output
clock of CKo0.
FPo1: 8 kHz frame pulse corresponding to the 8.192 MHz output
clock of CKo1.
FPo2: 8 kHz frame pulse corresponding to 16.384 MHz output
clock of CKo2.
FPo3: Programmable 8 kHz frame pulse corresponding to
4.096 MHz, 8.192 MHz, 16.384 MHz, or 32.768 MHz output clock
of CKo3.
In Divided Slave modes, the frame pulse width of FPo0 - 3 cannot
be narrower than the input frame pulse (FPi) width.
H14, D11
100, 104
FPo_OFF0 - 1
Generated Offset Frame Pulse Outputs 0 to 1 (5 V-Tolerant
Three-state Outputs)
Individually programmable 8 kHz frame pulses, offset from the
output frame boundary by a programmable number of channels.
F15
108
FPo_OFF2
or
FPo5
Generated Offset Frame Pulse Output 2 or 19.44 MHz Frame
Pulse Output (5 V-Tolerant Three-state Output)
As FPo_OFF2, this is an individually programmable 8 kHz frame
pulse, offset from the output frame boundary by a programmable
number of channels.
By programming the FP19EN (bit 10) of FPOFF2 register to high,
this signal becomes FPo5, a non-offset frame pulse corresponding
to the 19.44 MHz clock presented on CKo5. FPo5 is only available
in Master mode or when the SLV_DPLLEN bit in the Control
Register is set high while the device is in one of the slave modes.
B7, C7, B5,
J6, D6, H5
170, 172,
174, 227,
176, 221
CKo0 - 5
ST-BUS/GCI-Bus Clock Outputs 0 to 5 (5 V-Tolerant
Three-state Outputs)
CKo0: 4.096 MHz output clock.
CKo1: 8.192 MHz output clock.
CKo2: 16.384 MHz output clock.
CKo3: 4.096 MHz, 8.192 MHz, 16.384 MHz or 32.768 MHz
programmable output clock.
CKo4: 1.544 MHz or 2.048 MHz programmable output clock.
CKo5: 19.44 MHz output clock
See Section 6.0 on page 24 for details. In Divided Slave mode, the
frequency of CKo0 - 3 cannot be higher than input clock (CKi).
CKo4 and CKo5 are only available in Master mode or when the
SLV_DPLLEN bit in the Control Register is set high while the
device is in one of the slave modes.
PBGA Pin
Number
LQFP Pin
Number
Pin Name
Description
相關(guān)PDF資料
PDF描述
ZL50022GAC Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50022QCC Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50023 Enhanced 4 K Digital Switch
ZL50023GAC Enhanced 4 K Digital Switch
ZL50023QCC Enhanced 4 K Digital Switch
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50022_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 4 K Digital Switch with Stratum 4E DPLL
ZL50022GAC 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION AND S4 - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50022GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 4K X 4K 1.8V/3.3V 256BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50022QCC 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION AND S4E DPLL - Trays
ZL50022QCG1 制造商:Microsemi Corporation 功能描述:PB FREE 4K +RATE CONVERSION & 256L LQFP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP
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