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參數(shù)資料
型號(hào): ZL50023
廠商: Zarlink Semiconductor Inc.
英文描述: Enhanced 4 K Digital Switch
中文描述: 增強(qiáng)為4 K數(shù)字開關(guān)
文件頁(yè)數(shù): 12/80頁(yè)
文件大?。?/td> 1341K
代理商: ZL50023
ZL50023
Data Sheet
12
Zarlink Semiconductor Inc.
B10
155
FPi
ST-BUS/GCI-Bus
Schmitt-Triggered Input)
This pin accepts the frame pulse which stays active for 61 ns,
122 ns or 244 ns at the frame boundary. The frame pulse
frequency is 8 kHz. The frame pulse associated with the CKi must
be applied to this pin. If the data rate is 16.384 Mbps, a 61 ns wide
frame pulse must be used. By default, the device accepts a
negative frame pulse in ST-BUS format, but it can accept a
positive frame pulse instead if the FPINP bit is set high in the
Control Register (CR). It can accept a GCI-formatted frame pulse
by programming the FPINPOS bit in the Control Register (CR) to
high.
Frame
Pulse
Input
(5 V-Tolerant
B11
154
CKi
ST-BUS/GCI-Bus Clock Input (5 V-Tolerant Schmitt-Triggered
Input)
This pin accepts a 4.096 MHz, 8.192 MHz or 16.384 MHz clock.
In divided clock mode the clock frequency applied to this pin must
be
twice the highest input or output
data rate. In multiplied clock
mode the clock frequency applied to this pin must be
twice the
highest input
data rate.
The exception is, when data is running at 16.384 Mbps, a
16.384 MHz clock must be used. By default, the clock falling edge
defines the input frame boundary, but the device allows the clock
rising edge to define the frame boundary by programming the
CKINP bit in the Control Register (CR).
B6, C6, D5,
D4, B4, B3,
C5, C4, E3,
C2, B2, D2,
F3, F4, E2,
F2, E1, D1,
G1, F1, J1,
H1, K1, L1,
A7, A5, A6,
A4, A3, A2,
C1, B1
179, 180,
181, 182,
183, 184,
185, 187,
198, 200,
201, 202,
203, 204,
205, 206,
243, 244,
245, 246,
247, 248,
250, 252,
189, 190,
191, 192,
193, 194,
196, 197
STi0 - 31
Serial Input Streams 0 to 31 (5 V-Tolerant Inputs with Internal
Pull-downs)
The data rate of each input stream can be selected independently
using the Stream Input Control Registers (SICR[n]). In the
2.048 Mbps mode, these pins accept serial TDM data streams at
2.048 Mbps with 32 channels per frame. In the 4.096 Mbps mode,
these pins accept serial TDM data streams at 4.096 Mbps with 64
channels per frame. In the 8.192 Mbps mode, these pins accept
serial TDM data streams at 8.192 Mbps with 128 channels per
frame. In the 16.384 Mbps mode, these pins accept TDM data
streams at 16.384 Mbps with 256 channels per frame.
PBGA Pin
Number
LQFP Pin
Number
Pin Name
Description
相關(guān)PDF資料
PDF描述
ZL50023GAC Enhanced 4 K Digital Switch
ZL50023QCC Enhanced 4 K Digital Switch
ZL50030 Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch
ZL50030GAC Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 1 K x 1 K Local Switch
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50023_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Enhanced 4 K Digital Switch
ZL50023GAC 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50023GAG2 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 4K X 4K 1.8V/3.3V 256BGA - Trays 制造商:Microsemi Corporation 功能描述:PB FREE PARALLEL ACCESS CIRCUIT (PAC) 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256PBGA
ZL50023QCC 制造商:Microsemi Corporation 功能描述: 制造商:Microsemi Corporation 功能描述:4K WITH RATE CONVERSION - Trays
ZL50023QCG1 制造商:Microsemi Corporation 功能描述:PB FREE 4K WITH RATE CONVERSION 制造商:Microsemi Corporation 功能描述:PB FREE 4K WITH RATE CONVERSION - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP 制造商:Microsemi Corporation 功能描述:IC TDM SWITCH 4K-CH ENH 256LQFP